Lines Matching refs:to_i915
635 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in i9xx_select_p2_div()
692 if (!intel_PLL_is_valid(to_i915(dev), in i9xx_find_best_dpll()
748 if (!intel_PLL_is_valid(to_i915(dev), in pnv_find_best_dpll()
809 if (!intel_PLL_is_valid(to_i915(dev), in g4x_find_best_dpll()
842 if (IS_CHERRYVIEW(to_i915(dev))) { in vlv_PLL_is_optimal()
906 if (!intel_PLL_is_valid(to_i915(dev), in vlv_find_best_dpll()
975 if (!intel_PLL_is_valid(to_i915(dev), limit, &clock)) in chv_find_best_dpll()
1050 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in wait_for_pipe_scanline_moving()
1073 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_wait_for_pipe_off()
1288 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in assert_planes_disabled()
1378 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in _vlv_enable_pll()
1392 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in vlv_enable_pll()
1411 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in _chv_enable_pll()
1441 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in chv_enable_pll()
1486 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_enable_pll()
1532 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_disable_pll()
1623 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_enable_pch_transcoder()
1756 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_crtc_pch_transcoder()
1766 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in intel_crtc_max_vblank_count()
1796 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_enable_pipe()
1854 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_disable_pipe()
1899 struct drm_i915_private *dev_priv = to_i915(fb->dev); in intel_tile_width_bytes()
1947 return intel_tile_size(to_i915(fb->dev)) / in intel_tile_height()
1960 *tile_height = intel_tile_size(to_i915(fb->dev)) / tile_width_bytes; in intel_tile_dims()
2034 struct drm_i915_private *dev_priv = to_i915(fb->dev); in intel_surf_alignment()
2061 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in intel_plane_uses_fence()
2075 struct drm_i915_private *dev_priv = to_i915(dev); in intel_pin_and_fence_fb_obj()
2254 struct drm_i915_private *dev_priv = to_i915(fb->dev); in intel_adjust_aligned_offset()
2371 struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev); in intel_plane_compute_aligned_offset()
2391 struct drm_i915_private *dev_priv = to_i915(fb->dev); in intel_fb_offset_to_xy()
2539 struct drm_i915_private *dev_priv = to_i915(fb->dev); in intel_fb_stride_alignment()
2562 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in intel_plane_can_remap()
2796 to_i915(plane_state->base.plane->dev); in intel_plane_remap_gtt()
3038 struct drm_i915_private *dev_priv = to_i915(dev); in intel_alloc_initial_plane_obj()
3127 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in fixup_active_planes()
3175 struct drm_i915_private *dev_priv = to_i915(dev); in intel_find_initial_plane_obj()
3390 struct drm_i915_private *dev_priv = to_i915(plane_state->base.plane->dev); in skl_check_main_surface()
3573 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_max_stride()
3598 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_plane_ctl_crtc()
3617 to_i915(plane_state->base.plane->dev); in i9xx_plane_ctl()
3671 to_i915(plane_state->base.plane->dev); in i9xx_check_plane_surface()
3725 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_has_windowing()
3779 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_update_plane()
3849 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_disable_plane()
3880 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_plane_get_hw_state()
3915 struct drm_i915_private *dev_priv = to_i915(dev); in skl_detach_scaler()
4122 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in skl_plane_ctl_crtc()
4141 to_i915(plane_state->base.plane->dev); in skl_plane_ctl()
4178 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in glk_plane_color_ctl_crtc()
4197 to_i915(plane_state->base.plane->dev); in glk_plane_color_ctl()
4230 i915_redisable_vga(to_i915(dev)); in __intel_display_resume()
4250 if (!HAS_GMCH(to_i915(dev))) in __intel_display_resume()
4375 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in icl_set_pipe_chicken()
4401 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_update_pipe_config()
4439 struct drm_i915_private *dev_priv = to_i915(dev); in intel_fdi_normal_train()
4482 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_fdi_link_train()
4583 struct drm_i915_private *dev_priv = to_i915(dev); in gen6_fdi_link_train()
4716 struct drm_i915_private *dev_priv = to_i915(dev); in ivb_manual_fdi_link_train()
4834 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in ironlake_fdi_pll_enable()
4871 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_fdi_pll_disable()
4901 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_fdi_disable()
4995 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in lpt_program_iclkip()
5111 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_pch_transcoder_set_timings()
5154 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ivybridge_update_fdi_bc_bifurcation()
5217 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_pch_enable()
5300 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in lpt_pch_enable()
5315 struct drm_i915_private *dev_priv = to_i915(dev); in cpt_verify_modeset()
5417 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); in skl_update_scaler()
5534 struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev); in skl_update_scaler_plane()
5614 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in skylake_pfit_enable()
5651 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_pfit_enable()
5673 struct drm_i915_private *dev_priv = to_i915(dev); in hsw_enable_ips()
5709 struct drm_i915_private *dev_priv = to_i915(dev); in hsw_disable_ips()
5763 struct drm_i915_private *dev_priv = to_i915(dev); in intel_post_enable_primary()
5787 struct drm_i915_private *dev_priv = to_i915(dev); in intel_pre_disable_primary_noatomic()
5818 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_pre_update_disable_ips()
5845 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_post_update_enable_ips()
5903 struct drm_i915_private *dev_priv = to_i915(dev); in intel_post_plane_update()
5912 intel_frontbuffer_flip(to_i915(crtc->base.dev), pipe_config->fb_bits); in intel_post_plane_update()
5946 struct drm_i915_private *dev_priv = to_i915(dev); in intel_pre_plane_update()
6038 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_crtc_disable_planes()
6310 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_crtc_enable()
6403 return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A; in hsw_crtc_supports_ips()
6422 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in icl_pipe_mbus_enable()
6443 struct drm_i915_private *dev_priv = to_i915(crtc->dev); in haswell_crtc_enable()
6552 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_pfit_disable()
6569 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_crtc_disable()
6627 struct drm_i915_private *dev_priv = to_i915(crtc->dev); in haswell_crtc_disable()
6661 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_pfit_enable()
6749 struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev); in intel_aux_power_domain()
6791 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in get_crtc_power_domains()
6826 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in modeset_get_crtc_power_domains()
6856 struct drm_i915_private *dev_priv = to_i915(dev); in valleyview_crtc_enable()
6911 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_set_pll_dividers()
6922 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_crtc_enable()
6971 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_pfit_disable()
6988 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_crtc_disable()
7037 struct drm_i915_private *dev_priv = to_i915(crtc->dev); in intel_crtc_disable_noatomic()
7113 struct drm_i915_private *dev_priv = to_i915(dev); in intel_display_suspend()
7184 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_check_fdi_lanes()
7270 link_bw = intel_fdi_link_freq(to_i915(dev), pipe_config); in ironlake_fdi_compute_config()
7305 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_crtc_state_ips_capable()
7334 to_i915(crtc_state->base.crtc->dev); in hsw_compute_ips_config()
7364 const struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_crtc_supports_double_wide()
7408 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in intel_crtc_compute_pixel_rate()
7422 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_crtc_compute_config()
7567 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_update_pll_dividers()
7623 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_pch_transcoder_set_m_n()
7650 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_cpu_transcoder_set_m_n()
7741 struct drm_i915_private *dev_priv = to_i915(dev); in vlv_prepare_pll()
7841 struct drm_i915_private *dev_priv = to_i915(dev); in chv_prepare_pll()
8001 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_compute_dpll()
8075 struct drm_i915_private *dev_priv = to_i915(dev); in i8xx_compute_dpll()
8123 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_set_pipe_timings()
8185 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_set_pipe_src_size()
8200 struct drm_i915_private *dev_priv = to_i915(dev); in intel_get_pipe_timings()
8245 struct drm_i915_private *dev_priv = to_i915(dev); in intel_get_pipe_src_size()
8282 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_set_pipeconf()
8342 struct drm_i915_private *dev_priv = to_i915(dev); in i8xx_crtc_compute_clock()
8377 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in g4x_crtc_compute_clock()
8420 struct drm_i915_private *dev_priv = to_i915(dev); in pnv_crtc_compute_clock()
8454 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_crtc_compute_clock()
8538 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_get_pfit_config()
8565 struct drm_i915_private *dev_priv = to_i915(dev); in vlv_crtc_clock_get()
8593 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_get_initial_plane_config()
8675 struct drm_i915_private *dev_priv = to_i915(dev); in chv_crtc_clock_get()
8708 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_get_crtc_ycbcr_config()
8752 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_get_pipe_color_config()
8769 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_get_pipe_config()
9390 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_set_pipeconf()
9434 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in haswell_set_pipeconf()
9453 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in bdw_set_pipemisc()
9495 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in bdw_get_pipemisc_bpp()
9535 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_compute_dpll()
9636 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_crtc_compute_clock()
9693 struct drm_i915_private *dev_priv = to_i915(dev); in intel_pch_transcoder_get_m_n()
9710 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_cpu_transcoder_get_m_n()
9764 struct drm_i915_private *dev_priv = to_i915(dev); in skylake_get_pfit_config()
9796 struct drm_i915_private *dev_priv = to_i915(dev); in skylake_get_initial_plane_config()
9922 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_get_pfit_config()
9946 struct drm_i915_private *dev_priv = to_i915(dev); in ironlake_get_pipe_config()
10052 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in haswell_crtc_compute_clock()
10206 struct drm_i915_private *dev_priv = to_i915(dev); in hsw_get_transcoder_state()
10302 struct drm_i915_private *dev_priv = to_i915(dev); in bxt_get_dsi_transcoder_state()
10354 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in haswell_get_ddi_port_state()
10403 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in haswell_get_pipe_config()
10507 to_i915(plane_state->base.plane->dev); in intel_cursor_base()
10706 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i845_update_cursor()
10756 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i845_cursor_get_hw_state()
10786 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in i9xx_cursor_ctl_crtc()
10808 to_i915(plane_state->base.plane->dev); in i9xx_cursor_ctl()
10838 to_i915(plane_state->base.plane->dev); in i9xx_cursor_size_ok()
10877 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_check_cursor()
10932 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_update_cursor()
11002 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in i9xx_cursor_get_hw_state()
11098 struct drm_i915_private *dev_priv = to_i915(dev); in intel_get_load_detect_pipe()
11270 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_pll_refclk()
11288 struct drm_i915_private *dev_priv = to_i915(dev); in i9xx_crtc_clock_get()
11395 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ironlake_pch_clock_get()
11414 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_encoder_current_mode()
11508 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_plane_atomic_calc_changes()
11687 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in icl_check_nv12_planes()
11770 struct drm_i915_private *dev_priv = to_i915(crtc->dev); in intel_crtc_atomic_check()
11920 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in compute_baseline_pipe_bpp()
12075 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_dump_pipe_config()
12207 if (WARN_ON(!HAS_DDI(to_i915(dev)))) in check_digital_port_conflicts()
12242 to_i915(crtc_state->base.crtc->dev); in clear_intel_crtc_state()
12542 struct drm_i915_private *dev_priv = to_i915(current_config->base.crtc->dev); in intel_pipe_config_compare()
12878 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in verify_wm_state()
13094 struct drm_i915_private *dev_priv = to_i915(dev); in verify_crtc_state()
13227 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in verify_shared_dpll_state()
13282 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in update_scanline_offset()
13329 struct drm_i915_private *dev_priv = to_i915(state->base.dev); in intel_modeset_clear_plls()
13408 struct drm_i915_private *dev_priv = to_i915(state->base.dev); in intel_lock_all_pipes()
13425 struct drm_i915_private *dev_priv = to_i915(state->base.dev); in intel_modeset_all_pipes()
13461 struct drm_i915_private *dev_priv = to_i915(state->base.dev); in intel_modeset_checks()
13574 struct drm_i915_private *dev_priv = to_i915(dev); in calc_watermark_data()
13614 struct drm_i915_private *dev_priv = to_i915(dev); in intel_atomic_check()
13733 struct drm_i915_private *dev_priv = to_i915(dev); in intel_update_crtc()
13789 struct drm_i915_private *dev_priv = to_i915(state->base.dev); in skl_update_crtcs()
13883 struct drm_i915_private *dev_priv = to_i915(intel_state->base.dev); in intel_atomic_commit_fence_wait()
13911 struct drm_i915_private *i915 = to_i915(state->dev); in intel_atomic_cleanup_work()
13923 struct drm_i915_private *dev_priv = to_i915(dev); in intel_atomic_commit_tail()
14127 &to_i915(state->base.dev)->atomic_helper; in intel_atomic_commit_ready()
14156 struct drm_i915_private *dev_priv = to_i915(dev); in intel_atomic_commit()
14281 if (INTEL_GEN(to_i915(crtc->dev)) < 6) in add_rps_boost_after_vblank()
14305 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); in intel_plane_pin_fb()
14370 struct drm_i915_private *dev_priv = to_i915(plane->dev); in intel_prepare_plane_fb()
14484 struct drm_i915_private *dev_priv = to_i915(plane->dev); in intel_cleanup_plane_fb()
14502 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in skl_max_scale()
14535 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_begin_crtc_commit()
14569 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_crtc_arm_fifo_underrun()
14694 struct drm_i915_private *dev_priv = to_i915(crtc->dev); in intel_legacy_cursor_update()
15018 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_crtc_init_scalers()
15596 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); in intel_framebuffer_init()
15762 struct drm_i915_private *dev_priv = to_i915(dev); in intel_mode_valid()
15964 struct drm_i915_private *dev_priv = to_i915(dev); in intel_modeset_init_hw()
15983 struct drm_i915_private *dev_priv = to_i915(dev); in sanitize_watermarks()
16130 struct drm_i915_private *dev_priv = to_i915(dev); in intel_modeset_init()
16438 struct drm_i915_private *dev_priv = to_i915(dev); in intel_sanitize_crtc()
16509 struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev); in has_bogus_dpll_config()
16529 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in intel_sanitize_encoder()
16662 struct drm_i915_private *dev_priv = to_i915(dev); in intel_modeset_readout_hw_state()
16944 struct drm_i915_private *dev_priv = to_i915(dev); in intel_modeset_setup_hw_state()
17040 struct drm_i915_private *dev_priv = to_i915(dev); in intel_display_resume()
17092 struct drm_i915_private *dev_priv = to_i915(dev); in intel_modeset_driver_remove()