Lines Matching refs:reduced_clock
7565 struct dpll *reduced_clock) in i9xx_update_pll_dividers() argument
7572 if (reduced_clock) in i9xx_update_pll_dividers()
7573 fp2 = pnv_dpll_compute_fp(reduced_clock); in i9xx_update_pll_dividers()
7576 if (reduced_clock) in i9xx_update_pll_dividers()
7577 fp2 = i9xx_dpll_compute_fp(reduced_clock); in i9xx_update_pll_dividers()
7583 reduced_clock) { in i9xx_update_pll_dividers()
7999 struct dpll *reduced_clock) in i9xx_compute_dpll() argument
8005 i9xx_update_pll_dividers(crtc, crtc_state, reduced_clock); in i9xx_compute_dpll()
8032 if (IS_G4X(dev_priv) && reduced_clock) in i9xx_compute_dpll()
8033 dpll |= (1 << (reduced_clock->p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT; in i9xx_compute_dpll()
8072 struct dpll *reduced_clock) in i8xx_compute_dpll() argument
8079 i9xx_update_pll_dividers(crtc, crtc_state, reduced_clock); in i8xx_compute_dpll()
9533 struct dpll *reduced_clock) in ironlake_compute_dpll() argument
9556 if (reduced_clock) { in ironlake_compute_dpll()
9557 fp2 = i9xx_dpll_compute_fp(reduced_clock); in ironlake_compute_dpll()
9559 if (reduced_clock->m < factor * reduced_clock->n) in ironlake_compute_dpll()