2330 	int n_entries, ln;  in cnl_ddi_vswing_program()  local
2363 	for (ln = 0; ln < 4; ln++) {  in cnl_ddi_vswing_program()
2364 		val = I915_READ(CNL_PORT_TX_DW4_LN(ln, port));  in cnl_ddi_vswing_program()
2370 		I915_WRITE(CNL_PORT_TX_DW4_LN(ln, port), val);  in cnl_ddi_vswing_program()
2393 	int width, rate, ln;  in cnl_ddi_vswing_sequence()  local
2425 	for (ln = 0; ln <= 3; ln++) {  in cnl_ddi_vswing_sequence()
2426 		val = I915_READ(CNL_PORT_TX_DW4_LN(ln, port));  in cnl_ddi_vswing_sequence()
2429 		if ((rate <= 600000 && width == 4 && ln >= 1)  ||  in cnl_ddi_vswing_sequence()
2430 		    (rate <= 600000 && width < 4 && (ln == 1 || ln == 2))) {  in cnl_ddi_vswing_sequence()
2433 		I915_WRITE(CNL_PORT_TX_DW4_LN(ln, port), val);  in cnl_ddi_vswing_sequence()
2461 	int ln;  in icl_ddi_combo_vswing_program()  local
2494 	for (ln = 0; ln <= 3; ln++) {  in icl_ddi_combo_vswing_program()
2495 		val = I915_READ(ICL_PORT_TX_DW4_LN(ln, phy));  in icl_ddi_combo_vswing_program()
2501 		I915_WRITE(ICL_PORT_TX_DW4_LN(ln, phy), val);  in icl_ddi_combo_vswing_program()
2520 	int ln = 0;  in icl_combo_phy_ddi_vswing_sequence()  local
2551 	for (ln = 0; ln <= 3; ln++) {  in icl_combo_phy_ddi_vswing_sequence()
2552 		val = I915_READ(ICL_PORT_TX_DW4_LN(ln, phy));  in icl_combo_phy_ddi_vswing_sequence()
2555 		if ((rate <= 600000 && width == 4 && ln >= 1) ||  in icl_combo_phy_ddi_vswing_sequence()
2556 		    (rate <= 600000 && width < 4 && (ln == 1 || ln == 2))) {  in icl_combo_phy_ddi_vswing_sequence()
2559 		I915_WRITE(ICL_PORT_TX_DW4_LN(ln, phy), val);  in icl_combo_phy_ddi_vswing_sequence()
2589 	int ln;  in icl_mg_phy_ddi_vswing_sequence()  local
2601 	for (ln = 0; ln < 2; ln++) {  in icl_mg_phy_ddi_vswing_sequence()
2602 		val = I915_READ(MG_TX1_LINK_PARAMS(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2604 		I915_WRITE(MG_TX1_LINK_PARAMS(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2606 		val = I915_READ(MG_TX2_LINK_PARAMS(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2608 		I915_WRITE(MG_TX2_LINK_PARAMS(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2612 	for (ln = 0; ln < 2; ln++) {  in icl_mg_phy_ddi_vswing_sequence()
2613 		val = I915_READ(MG_TX1_SWINGCTRL(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2617 		I915_WRITE(MG_TX1_SWINGCTRL(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2619 		val = I915_READ(MG_TX2_SWINGCTRL(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2623 		I915_WRITE(MG_TX2_SWINGCTRL(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2627 	for (ln = 0; ln < 2; ln++) {  in icl_mg_phy_ddi_vswing_sequence()
2628 		val = I915_READ(MG_TX1_DRVCTRL(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2636 		I915_WRITE(MG_TX1_DRVCTRL(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2638 		val = I915_READ(MG_TX2_DRVCTRL(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2646 		I915_WRITE(MG_TX2_DRVCTRL(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2656 	for (ln = 0; ln < 2; ln++) {  in icl_mg_phy_ddi_vswing_sequence()
2657 		val = I915_READ(MG_CLKHUB(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2662 		I915_WRITE(MG_CLKHUB(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2666 	for (ln = 0; ln < 2; ln++) {  in icl_mg_phy_ddi_vswing_sequence()
2667 		val = I915_READ(MG_TX1_DCC(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2675 		I915_WRITE(MG_TX1_DCC(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2677 		val = I915_READ(MG_TX2_DCC(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2685 		I915_WRITE(MG_TX2_DCC(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2689 	for (ln = 0; ln < 2; ln++) {  in icl_mg_phy_ddi_vswing_sequence()
2690 		val = I915_READ(MG_TX1_PISO_READLOAD(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2692 		I915_WRITE(MG_TX1_PISO_READLOAD(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2694 		val = I915_READ(MG_TX2_PISO_READLOAD(ln, port));  in icl_mg_phy_ddi_vswing_sequence()
2696 		I915_WRITE(MG_TX2_PISO_READLOAD(ln, port), val);  in icl_mg_phy_ddi_vswing_sequence()
2998 	int ln;  in icl_enable_phy_clock_gating()  local
3003 	for (ln = 0; ln < 2; ln++) {  in icl_enable_phy_clock_gating()
3004 		val = I915_READ(MG_DP_MODE(ln, port));  in icl_enable_phy_clock_gating()
3010 		I915_WRITE(MG_DP_MODE(ln, port), val);  in icl_enable_phy_clock_gating()
3030 	int ln;  in icl_disable_phy_clock_gating()  local
3035 	for (ln = 0; ln < 2; ln++) {  in icl_disable_phy_clock_gating()
3036 		val = I915_READ(MG_DP_MODE(ln, port));  in icl_disable_phy_clock_gating()
3042 		I915_WRITE(MG_DP_MODE(ln, port), val);  in icl_disable_phy_clock_gating()