166 	u32 adpa;  in intel_crt_set_dpms()  local
169 		adpa = ADPA_HOTPLUG_BITS;  in intel_crt_set_dpms()
171 		adpa = 0;  in intel_crt_set_dpms()
174 		adpa |= ADPA_HSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
176 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
182 		adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe);  in intel_crt_set_dpms()
184 		adpa |= ADPA_PIPE_SEL(crtc->pipe);  in intel_crt_set_dpms()
191 		adpa |= ADPA_DAC_ENABLE;  in intel_crt_set_dpms()
194 		adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
197 		adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
200 		adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
204 	I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_set_dpms()
427 	u32 adpa;  in intel_ironlake_crt_detect_hotplug()  local
437 		save_adpa = adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
438 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in intel_ironlake_crt_detect_hotplug()
440 		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in intel_ironlake_crt_detect_hotplug()
442 			adpa &= ~ADPA_DAC_ENABLE;  in intel_ironlake_crt_detect_hotplug()
444 		I915_WRITE(crt->adpa_reg, adpa);  in intel_ironlake_crt_detect_hotplug()
459 	adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
460 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in intel_ironlake_crt_detect_hotplug()
464 	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);  in intel_ironlake_crt_detect_hotplug()
475 	u32 adpa;  in valleyview_crt_detect_hotplug()  local
493 	save_adpa = adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
494 	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in valleyview_crt_detect_hotplug()
496 	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in valleyview_crt_detect_hotplug()
498 	I915_WRITE(crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
507 	adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
508 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in valleyview_crt_detect_hotplug()
513 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);  in valleyview_crt_detect_hotplug()
911 		u32 adpa;  in intel_crt_reset()  local
913 		adpa = I915_READ(crt->adpa_reg);  in intel_crt_reset()
914 		adpa &= ~ADPA_CRT_HOTPLUG_MASK;  in intel_crt_reset()
915 		adpa |= ADPA_HOTPLUG_BITS;  in intel_crt_reset()
916 		I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_reset()
919 		DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);  in intel_crt_reset()
955 	u32 adpa;  in intel_crt_init()  local
964 	adpa = I915_READ(adpa_reg);  in intel_crt_init()
965 	if ((adpa & ADPA_DAC_ENABLE) == 0) {  in intel_crt_init()
974 		I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |  in intel_crt_init()
978 		I915_WRITE(adpa_reg, adpa);  in intel_crt_init()