64 		temp = REG_READ(map->conf);  in mdfldWaitForPipeDisable()
92 		temp = REG_READ(map->conf);  in mdfldWaitForPipeEnable()
106 	pfit_control = REG_READ(PFIT_CONTROL);  in psb_intel_panel_fitter_pipe()
124 	dspcntr = REG_READ(dspcntr_reg);  in mdfld__intel_plane_set_alpha()
193 	dspcntr = REG_READ(map->cntr);  in mdfld__intel_pipe_set_base()
216 	REG_READ(map->linoff);  in mdfld__intel_pipe_set_base()
218 	REG_READ(map->surf);  in mdfld__intel_pipe_set_base()
243 	temp = REG_READ(map->cntr);  in mdfld_disable_crtc()
248 		REG_WRITE(map->base, REG_READ(map->base));  in mdfld_disable_crtc()
249 		REG_READ(map->base);  in mdfld_disable_crtc()
255 	temp = REG_READ(map->conf);  in mdfld_disable_crtc()
260 		REG_READ(map->conf);  in mdfld_disable_crtc()
266 	temp = REG_READ(map->dpll);  in mdfld_disable_crtc()
269 			!((REG_READ(PIPEACONF) | REG_READ(PIPECCONF))  in mdfld_disable_crtc()
273 			REG_READ(map->dpll);  in mdfld_disable_crtc()
322 		temp = REG_READ(map->dpll);  in mdfld_crtc_dpms()
335 			REG_READ(map->dpll);  in mdfld_crtc_dpms()
340 			REG_READ(map->dpll);  in mdfld_crtc_dpms()
348 			  !(REG_READ(map->conf) & PIPECONF_DSIPLL_LOCK)) {  in mdfld_crtc_dpms()
355 		temp = REG_READ(map->cntr);  in mdfld_crtc_dpms()
360 			REG_WRITE(map->base, REG_READ(map->base));  in mdfld_crtc_dpms()
364 		temp = REG_READ(map->conf);  in mdfld_crtc_dpms()
375 			REG_WRITE(map->status, REG_READ(map->status));  in mdfld_crtc_dpms()
377 			if (PIPE_VBLANK_STATUS & REG_READ(map->status))  in mdfld_crtc_dpms()
382 				temp = REG_READ(map->cntr);  in mdfld_crtc_dpms()
385 				REG_WRITE(map->base, REG_READ(map->base));  in mdfld_crtc_dpms()
389 				temp = REG_READ(map->conf);  in mdfld_crtc_dpms()
395 				REG_WRITE(0xb004, REG_READ(0xb004));  in mdfld_crtc_dpms()
398 				temp = REG_READ(map->cntr);  in mdfld_crtc_dpms()
401 				REG_WRITE(map->base, REG_READ(map->base));  in mdfld_crtc_dpms()
405 				temp = REG_READ(map->conf);  in mdfld_crtc_dpms()
431 		temp = REG_READ(map->cntr);  in mdfld_crtc_dpms()
436 			REG_WRITE(map->base, REG_READ(map->base));  in mdfld_crtc_dpms()
437 			REG_READ(map->base);  in mdfld_crtc_dpms()
441 		temp = REG_READ(map->conf);  in mdfld_crtc_dpms()
446 			REG_READ(map->conf);  in mdfld_crtc_dpms()
452 		temp = REG_READ(map->dpll);  in mdfld_crtc_dpms()
454 			if ((pipe != 1 && !((REG_READ(PIPEACONF)  in mdfld_crtc_dpms()
455 				| REG_READ(PIPECCONF)) & PIPEACONF_ENABLE))  in mdfld_crtc_dpms()
459 				REG_READ(map->dpll);  in mdfld_crtc_dpms()
848 	dev_priv->dspcntr[pipe] = REG_READ(map->cntr);  in mdfld_crtc_mode_set()
915 		dpll = REG_READ(map->dpll);  in mdfld_crtc_mode_set()
920 			REG_READ(map->dpll);  in mdfld_crtc_mode_set()
986 	REG_READ(map->dpll);  in mdfld_crtc_mode_set()
990 			!(REG_READ(map->conf) & PIPECONF_DSIPLL_LOCK)) {  in mdfld_crtc_mode_set()
1001 	REG_READ(map->conf);  in mdfld_crtc_mode_set()