18 	u32 (*sample)(struct etnaviv_gpu *gpu,
39 static u32 perf_reg_read(struct etnaviv_gpu *gpu,  in perf_reg_read()  argument
43 	gpu_write(gpu, domain->profile_config, signal->data);  in perf_reg_read()
45 	return gpu_read(gpu, domain->profile_read);  in perf_reg_read()
48 static u32 pipe_reg_read(struct etnaviv_gpu *gpu,  in pipe_reg_read()  argument
52 	u32 clock = gpu_read(gpu, VIVS_HI_CLOCK_CONTROL);  in pipe_reg_read()
56 	for (i = 0; i < gpu->identity.pixel_pipes; i++) {  in pipe_reg_read()
59 		gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);  in pipe_reg_read()
60 		gpu_write(gpu, domain->profile_config, signal->data);  in pipe_reg_read()
61 		value += gpu_read(gpu, domain->profile_read);  in pipe_reg_read()
67 	gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, clock);  in pipe_reg_read()
72 static u32 hi_total_cycle_read(struct etnaviv_gpu *gpu,  in hi_total_cycle_read()  argument
78 	if (gpu->identity.model == chipModel_GC880 ||  in hi_total_cycle_read()
79 		gpu->identity.model == chipModel_GC2000 ||  in hi_total_cycle_read()
80 		gpu->identity.model == chipModel_GC2100)  in hi_total_cycle_read()
83 	return gpu_read(gpu, reg);  in hi_total_cycle_read()
86 static u32 hi_total_idle_cycle_read(struct etnaviv_gpu *gpu,  in hi_total_idle_cycle_read()  argument
92 	if (gpu->identity.model == chipModel_GC880 ||  in hi_total_idle_cycle_read()
93 		gpu->identity.model == chipModel_GC2000 ||  in hi_total_idle_cycle_read()
94 		gpu->identity.model == chipModel_GC2100)  in hi_total_idle_cycle_read()
97 	return gpu_read(gpu, reg);  in hi_total_idle_cycle_read()
426 int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu,  in etnaviv_pm_query_dom()  argument
448 int etnaviv_pm_query_sig(struct etnaviv_gpu *gpu,  in etnaviv_pm_query_sig()  argument
492 void etnaviv_perfmon_process(struct etnaviv_gpu *gpu,  in etnaviv_perfmon_process()  argument
503 	val = sig->sample(gpu, dom, sig);  in etnaviv_perfmon_process()