88 static void etnaviv_cmd_select_pipe(struct etnaviv_gpu *gpu,  in etnaviv_cmd_select_pipe()  argument
93 	lockdep_assert_held(&gpu->lock);  in etnaviv_cmd_select_pipe()
101 	if (gpu->exec_state == ETNA_PIPE_2D)  in etnaviv_cmd_select_pipe()
103 	else if (gpu->exec_state == ETNA_PIPE_3D)  in etnaviv_cmd_select_pipe()
114 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu,  in etnaviv_buffer_dump()  argument
120 	dev_info(gpu->dev, "virt %p phys 0x%08x free 0x%08x\n",  in etnaviv_buffer_dump()
122 			&gpu->mmu_context->cmdbuf_mapping) +  in etnaviv_buffer_dump()
150 static u32 etnaviv_buffer_reserve(struct etnaviv_gpu *gpu,  in etnaviv_buffer_reserve()  argument
157 				     &gpu->mmu_context->cmdbuf_mapping) +  in etnaviv_buffer_reserve()
161 u16 etnaviv_buffer_init(struct etnaviv_gpu *gpu)  in etnaviv_buffer_init()  argument
163 	struct etnaviv_cmdbuf *buffer = &gpu->buffer;  in etnaviv_buffer_init()
165 	lockdep_assert_held(&gpu->lock);  in etnaviv_buffer_init()
172 		 etnaviv_cmdbuf_get_va(buffer, &gpu->mmu_context->cmdbuf_mapping)  in etnaviv_buffer_init()
178 u16 etnaviv_buffer_config_mmuv2(struct etnaviv_gpu *gpu, u32 mtlb_addr, u32 safe_addr)  in etnaviv_buffer_config_mmuv2()  argument
180 	struct etnaviv_cmdbuf *buffer = &gpu->buffer;  in etnaviv_buffer_config_mmuv2()
182 	lockdep_assert_held(&gpu->lock);  in etnaviv_buffer_config_mmuv2()
186 	if (gpu->identity.features & chipFeatures_PIPE_3D) {  in etnaviv_buffer_config_mmuv2()
196 	if (gpu->identity.features & chipFeatures_PIPE_2D) {  in etnaviv_buffer_config_mmuv2()
213 u16 etnaviv_buffer_config_pta(struct etnaviv_gpu *gpu, unsigned short id)  in etnaviv_buffer_config_pta()  argument
215 	struct etnaviv_cmdbuf *buffer = &gpu->buffer;  in etnaviv_buffer_config_pta()
217 	lockdep_assert_held(&gpu->lock);  in etnaviv_buffer_config_pta()
231 void etnaviv_buffer_end(struct etnaviv_gpu *gpu)  in etnaviv_buffer_end()  argument
233 	struct etnaviv_cmdbuf *buffer = &gpu->buffer;  in etnaviv_buffer_end()
237 	lockdep_assert_held(&gpu->lock);  in etnaviv_buffer_end()
239 	if (gpu->exec_state == ETNA_PIPE_2D)  in etnaviv_buffer_end()
241 	else if (gpu->exec_state == ETNA_PIPE_3D)  in etnaviv_buffer_end()
251 		link_target = etnaviv_buffer_reserve(gpu, buffer, dwords);  in etnaviv_buffer_end()
256 		if (gpu->exec_state == ETNA_PIPE_3D)  in etnaviv_buffer_end()
275 void etnaviv_sync_point_queue(struct etnaviv_gpu *gpu, unsigned int event)  in etnaviv_sync_point_queue()  argument
277 	struct etnaviv_cmdbuf *buffer = &gpu->buffer;  in etnaviv_sync_point_queue()
281 	lockdep_assert_held(&gpu->lock);  in etnaviv_sync_point_queue()
288 	target = etnaviv_buffer_reserve(gpu, buffer, dwords);  in etnaviv_sync_point_queue()
300 		 etnaviv_cmdbuf_get_va(buffer, &gpu->mmu_context->cmdbuf_mapping)  in etnaviv_sync_point_queue()
314 void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, u32 exec_state,  in etnaviv_buffer_queue()  argument
318 	struct etnaviv_cmdbuf *buffer = &gpu->buffer;  in etnaviv_buffer_queue()
322 	bool switch_context = gpu->exec_state != exec_state;  in etnaviv_buffer_queue()
323 	bool switch_mmu_context = gpu->mmu_context != mmu_context;  in etnaviv_buffer_queue()
324 	unsigned int new_flush_seq = READ_ONCE(gpu->mmu_context->flush_seq);  in etnaviv_buffer_queue()
325 	bool need_flush = switch_mmu_context || gpu->flush_seq != new_flush_seq;  in etnaviv_buffer_queue()
327 	lockdep_assert_held(&gpu->lock);  in etnaviv_buffer_queue()
330 		etnaviv_buffer_dump(gpu, buffer, 0, 0x50);  in etnaviv_buffer_queue()
333 					    &gpu->mmu_context->cmdbuf_mapping);  in etnaviv_buffer_queue()
349 			if (gpu->mmu_context->global->version == ETNAVIV_IOMMU_V1)  in etnaviv_buffer_queue()
360 		if (switch_mmu_context && gpu->sec_mode == ETNA_SEC_KERNEL)  in etnaviv_buffer_queue()
363 		target = etnaviv_buffer_reserve(gpu, buffer, extra_dwords);  in etnaviv_buffer_queue()
371 			struct etnaviv_iommu_context *old_context = gpu->mmu_context;  in etnaviv_buffer_queue()
374 			gpu->mmu_context = mmu_context;  in etnaviv_buffer_queue()
380 			if (gpu->mmu_context->global->version == ETNAVIV_IOMMU_V1) {  in etnaviv_buffer_queue()
392 				    gpu->sec_mode == ETNA_SEC_KERNEL) {  in etnaviv_buffer_queue()
394 						etnaviv_iommuv2_get_pta_id(gpu->mmu_context);  in etnaviv_buffer_queue()
400 				if (gpu->sec_mode == ETNA_SEC_NONE)  in etnaviv_buffer_queue()
401 					flush |= etnaviv_iommuv2_get_mtlb_addr(gpu->mmu_context);  in etnaviv_buffer_queue()
411 			gpu->flush_seq = new_flush_seq;  in etnaviv_buffer_queue()
415 			etnaviv_cmd_select_pipe(gpu, buffer, exec_state);  in etnaviv_buffer_queue()
416 			gpu->exec_state = exec_state;  in etnaviv_buffer_queue()
421 					&gpu->mmu_context->cmdbuf_mapping);  in etnaviv_buffer_queue()
436 	return_target = etnaviv_buffer_reserve(gpu, buffer, return_dwords);  in etnaviv_buffer_queue()
443 	if (gpu->exec_state == ETNA_PIPE_2D) {  in etnaviv_buffer_queue()
459 		 etnaviv_cmdbuf_get_va(buffer, &gpu->mmu_context->cmdbuf_mapping)  in etnaviv_buffer_queue()
465 			etnaviv_cmdbuf_get_va(cmdbuf, &gpu->mmu_context->cmdbuf_mapping),  in etnaviv_buffer_queue()
488 		etnaviv_buffer_dump(gpu, buffer, 0, 0x50);  in etnaviv_buffer_queue()