Lines Matching refs:hwdev
147 int (*query_hw)(struct malidp_hw_device *hwdev);
152 void (*enter_config_mode)(struct malidp_hw_device *hwdev);
157 void (*leave_config_mode)(struct malidp_hw_device *hwdev);
162 bool (*in_config_mode)(struct malidp_hw_device *hwdev);
171 void (*set_config_valid)(struct malidp_hw_device *hwdev, u8 value);
177 void (*modeset)(struct malidp_hw_device *hwdev, struct videomode *m);
183 int (*rotmem_required)(struct malidp_hw_device *hwdev, u16 w, u16 h,
186 int (*se_set_scaling_coeffs)(struct malidp_hw_device *hwdev,
190 long (*se_calc_mclk)(struct malidp_hw_device *hwdev,
203 int (*enable_memwrite)(struct malidp_hw_device *hwdev, dma_addr_t *addrs,
210 void (*disable_memwrite)(struct malidp_hw_device *hwdev);
256 static inline u32 malidp_hw_read(struct malidp_hw_device *hwdev, u32 reg) in malidp_hw_read() argument
258 WARN_ON(hwdev->pm_suspended); in malidp_hw_read()
259 return readl(hwdev->regs + reg); in malidp_hw_read()
262 static inline void malidp_hw_write(struct malidp_hw_device *hwdev, in malidp_hw_write() argument
265 WARN_ON(hwdev->pm_suspended); in malidp_hw_write()
266 writel(value, hwdev->regs + reg); in malidp_hw_write()
269 static inline void malidp_hw_setbits(struct malidp_hw_device *hwdev, in malidp_hw_setbits() argument
272 u32 data = malidp_hw_read(hwdev, reg); in malidp_hw_setbits()
275 malidp_hw_write(hwdev, data, reg); in malidp_hw_setbits()
278 static inline void malidp_hw_clearbits(struct malidp_hw_device *hwdev, in malidp_hw_clearbits() argument
281 u32 data = malidp_hw_read(hwdev, reg); in malidp_hw_clearbits()
284 malidp_hw_write(hwdev, data, reg); in malidp_hw_clearbits()
287 static inline u32 malidp_get_block_base(struct malidp_hw_device *hwdev, in malidp_get_block_base() argument
292 return hwdev->hw->map.se_base; in malidp_get_block_base()
294 return hwdev->hw->map.dc_base; in malidp_get_block_base()
300 static inline void malidp_hw_disable_irq(struct malidp_hw_device *hwdev, in malidp_hw_disable_irq() argument
303 u32 base = malidp_get_block_base(hwdev, block); in malidp_hw_disable_irq()
305 malidp_hw_clearbits(hwdev, irq, base + MALIDP_REG_MASKIRQ); in malidp_hw_disable_irq()
308 static inline void malidp_hw_enable_irq(struct malidp_hw_device *hwdev, in malidp_hw_enable_irq() argument
311 u32 base = malidp_get_block_base(hwdev, block); in malidp_hw_enable_irq()
313 malidp_hw_setbits(hwdev, irq, base + MALIDP_REG_MASKIRQ); in malidp_hw_enable_irq()
317 void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev);
318 void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev);
319 void malidp_de_irq_fini(struct malidp_hw_device *hwdev);
321 void malidp_se_irq_fini(struct malidp_hw_device *hwdev);
328 static inline u8 malidp_hw_get_pitch_align(struct malidp_hw_device *hwdev, bool rotated) in malidp_hw_get_pitch_align() argument
334 if (hwdev->hw->map.bus_align_bytes == 8) in malidp_hw_get_pitch_align()
337 return hwdev->hw->map.bus_align_bytes << (rotated ? 2 : 0); in malidp_hw_get_pitch_align()
363 static inline void malidp_se_set_enh_coeffs(struct malidp_hw_device *hwdev) in malidp_se_set_enh_coeffs() argument
370 u32 image_enh = hwdev->hw->map.se_base + in malidp_se_set_enh_coeffs()
371 ((hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ) ? in malidp_se_set_enh_coeffs()
376 malidp_hw_write(hwdev, val, image_enh); in malidp_se_set_enh_coeffs()
378 malidp_hw_write(hwdev, enhancer_coeffs[i], enh_coeffs + i * 4); in malidp_se_set_enh_coeffs()