Lines Matching refs:hwdev
270 static int malidp500_query_hw(struct malidp_hw_device *hwdev) in malidp500_query_hw() argument
272 u32 conf = malidp_hw_read(hwdev, MALIDP500_CONFIG_ID); in malidp500_query_hw()
276 hwdev->min_line_size = 2; in malidp500_query_hw()
277 hwdev->max_line_size = SZ_2K * ln_size_mult; in malidp500_query_hw()
278 hwdev->rotation_memory[0] = SZ_1K * 64 * ln_size_mult; in malidp500_query_hw()
279 hwdev->rotation_memory[1] = 0; /* no second rotation memory bank */ in malidp500_query_hw()
284 static void malidp500_enter_config_mode(struct malidp_hw_device *hwdev) in malidp500_enter_config_mode() argument
288 malidp_hw_setbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL); in malidp500_enter_config_mode()
290 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp500_enter_config_mode()
303 static void malidp500_leave_config_mode(struct malidp_hw_device *hwdev) in malidp500_leave_config_mode() argument
307 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID); in malidp500_leave_config_mode()
308 malidp_hw_clearbits(hwdev, MALIDP500_DC_CONFIG_REQ, MALIDP500_DC_CONTROL); in malidp500_leave_config_mode()
310 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp500_leave_config_mode()
319 static bool malidp500_in_config_mode(struct malidp_hw_device *hwdev) in malidp500_in_config_mode() argument
323 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp500_in_config_mode()
330 static void malidp500_set_config_valid(struct malidp_hw_device *hwdev, u8 value) in malidp500_set_config_valid() argument
333 malidp_hw_setbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID); in malidp500_set_config_valid()
335 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP500_CONFIG_VALID); in malidp500_set_config_valid()
338 static void malidp500_modeset(struct malidp_hw_device *hwdev, struct videomode *mode) in malidp500_modeset() argument
342 malidp_hw_write(hwdev, hwdev->output_color_depth, in malidp500_modeset()
343 hwdev->hw->map.out_depth_base); in malidp500_modeset()
344 malidp_hw_clearbits(hwdev, MALIDP500_DC_CLEAR_MASK, MALIDP500_DC_CONTROL); in malidp500_modeset()
350 malidp_hw_setbits(hwdev, val, MALIDP500_DC_CONTROL); in malidp500_modeset()
360 malidp_hw_write(hwdev, val, MALIDP500_BGND_COLOR); in malidp500_modeset()
361 malidp_hw_write(hwdev, MALIDP_BGND_COLOR_B, MALIDP500_BGND_COLOR + 4); in malidp500_modeset()
365 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_H_TIMINGS); in malidp500_modeset()
369 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_V_TIMINGS); in malidp500_modeset()
373 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_SYNC_WIDTH); in malidp500_modeset()
376 malidp_hw_write(hwdev, val, MALIDP500_TIMINGS_BASE + MALIDP_DE_HV_ACTIVE); in malidp500_modeset()
379 malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp500_modeset()
381 malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp500_modeset()
408 static int malidp500_rotmem_required(struct malidp_hw_device *hwdev, u16 w, in malidp500_rotmem_required() argument
421 static void malidp500_se_write_pp_coefftab(struct malidp_hw_device *hwdev, in malidp500_se_write_pp_coefftab() argument
429 malidp_hw_write(hwdev, in malidp500_se_write_pp_coefftab()
433 malidp_hw_write(hwdev, MALIDP_SE_SET_COEFFTAB_DATA( in malidp500_se_write_pp_coefftab()
438 static int malidp500_se_set_scaling_coeffs(struct malidp_hw_device *hwdev, in malidp500_se_set_scaling_coeffs() argument
452 malidp500_se_write_pp_coefftab(hwdev, in malidp500_se_set_scaling_coeffs()
458 malidp500_se_write_pp_coefftab(hwdev, in malidp500_se_set_scaling_coeffs()
462 malidp500_se_write_pp_coefftab(hwdev, in malidp500_se_set_scaling_coeffs()
470 static long malidp500_se_calc_mclk(struct malidp_hw_device *hwdev, in malidp500_se_calc_mclk() argument
494 ret = clk_get_rate(hwdev->mclk); in malidp500_se_calc_mclk()
503 static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev, in malidp500_enable_memwrite() argument
509 u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp500_enable_memwrite()
512 malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC); in malidp500_enable_memwrite()
515 if (hwdev->mw_state != MW_NOT_ENABLED) in malidp500_enable_memwrite()
516 hwdev->mw_state = MW_RESTART; in malidp500_enable_memwrite()
518 hwdev->mw_state = MW_START; in malidp500_enable_memwrite()
520 malidp_hw_write(hwdev, fmt_id, base + MALIDP_MW_FORMAT); in malidp500_enable_memwrite()
523 malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW); in malidp500_enable_memwrite()
524 malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH); in malidp500_enable_memwrite()
525 malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE); in malidp500_enable_memwrite()
528 malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW); in malidp500_enable_memwrite()
529 malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH); in malidp500_enable_memwrite()
530 malidp_hw_write(hwdev, pitches[0], base + MALIDP_MW_P1_STRIDE); in malidp500_enable_memwrite()
536 malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h), in malidp500_enable_memwrite()
543 malidp_hw_write(hwdev, rgb2yuv_coeffs[i], in malidp500_enable_memwrite()
548 malidp_hw_setbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL); in malidp500_enable_memwrite()
553 static void malidp500_disable_memwrite(struct malidp_hw_device *hwdev) in malidp500_disable_memwrite() argument
555 u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp500_disable_memwrite()
557 if (hwdev->mw_state == MW_START || hwdev->mw_state == MW_RESTART) in malidp500_disable_memwrite()
558 hwdev->mw_state = MW_STOP; in malidp500_disable_memwrite()
559 malidp_hw_clearbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL); in malidp500_disable_memwrite()
560 malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC); in malidp500_disable_memwrite()
563 static int malidp550_query_hw(struct malidp_hw_device *hwdev) in malidp550_query_hw() argument
565 u32 conf = malidp_hw_read(hwdev, MALIDP550_CONFIG_ID); in malidp550_query_hw()
568 hwdev->min_line_size = 2; in malidp550_query_hw()
572 hwdev->max_line_size = SZ_2K; in malidp550_query_hw()
577 hwdev->max_line_size = SZ_4K; in malidp550_query_hw()
582 hwdev->max_line_size = 1280; in malidp550_query_hw()
588 hwdev->max_line_size = 0; in malidp550_query_hw()
592 hwdev->rotation_memory[0] = hwdev->rotation_memory[1] = rsize * SZ_1K; in malidp550_query_hw()
596 static void malidp550_enter_config_mode(struct malidp_hw_device *hwdev) in malidp550_enter_config_mode() argument
600 malidp_hw_setbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL); in malidp550_enter_config_mode()
602 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp550_enter_config_mode()
615 static void malidp550_leave_config_mode(struct malidp_hw_device *hwdev) in malidp550_leave_config_mode() argument
619 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID); in malidp550_leave_config_mode()
620 malidp_hw_clearbits(hwdev, MALIDP550_DC_CONFIG_REQ, MALIDP550_DC_CONTROL); in malidp550_leave_config_mode()
622 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp550_leave_config_mode()
631 static bool malidp550_in_config_mode(struct malidp_hw_device *hwdev) in malidp550_in_config_mode() argument
635 status = malidp_hw_read(hwdev, hwdev->hw->map.dc_base + MALIDP_REG_STATUS); in malidp550_in_config_mode()
642 static void malidp550_set_config_valid(struct malidp_hw_device *hwdev, u8 value) in malidp550_set_config_valid() argument
645 malidp_hw_setbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID); in malidp550_set_config_valid()
647 malidp_hw_clearbits(hwdev, MALIDP_CFG_VALID, MALIDP550_CONFIG_VALID); in malidp550_set_config_valid()
650 static void malidp550_modeset(struct malidp_hw_device *hwdev, struct videomode *mode) in malidp550_modeset() argument
654 malidp_hw_write(hwdev, hwdev->output_color_depth, in malidp550_modeset()
655 hwdev->hw->map.out_depth_base); in malidp550_modeset()
656 malidp_hw_write(hwdev, val, MALIDP550_DE_CONTROL); in malidp550_modeset()
669 malidp_hw_write(hwdev, val, MALIDP550_DE_BGND_COLOR); in malidp550_modeset()
673 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_H_TIMINGS); in malidp550_modeset()
677 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_V_TIMINGS); in malidp550_modeset()
685 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_SYNC_WIDTH); in malidp550_modeset()
688 malidp_hw_write(hwdev, val, MALIDP550_TIMINGS_BASE + MALIDP_DE_HV_ACTIVE); in malidp550_modeset()
691 malidp_hw_setbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp550_modeset()
693 malidp_hw_clearbits(hwdev, MALIDP_DISP_FUNC_ILACED, MALIDP_DE_DISPLAY_FUNC); in malidp550_modeset()
750 static int malidp550_rotmem_required(struct malidp_hw_device *hwdev, u16 w, in malidp550_rotmem_required() argument
777 static int malidp650_rotmem_required(struct malidp_hw_device *hwdev, u16 w, in malidp650_rotmem_required() argument
797 static int malidp550_se_set_scaling_coeffs(struct malidp_hw_device *hwdev, in malidp550_se_set_scaling_coeffs() argument
806 malidp_hw_clearbits(hwdev, mask, MALIDP550_SE_CONTROL); in malidp550_se_set_scaling_coeffs()
807 malidp_hw_setbits(hwdev, new_value, MALIDP550_SE_CONTROL); in malidp550_se_set_scaling_coeffs()
811 static long malidp550_se_calc_mclk(struct malidp_hw_device *hwdev, in malidp550_se_calc_mclk() argument
835 ret = clk_get_rate(hwdev->mclk); in malidp550_se_calc_mclk()
844 static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, in malidp550_enable_memwrite() argument
850 u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp550_enable_memwrite()
853 malidp_hw_setbits(hwdev, MALIDP_SCALE_ENGINE_EN, de_base + MALIDP_DE_DISPLAY_FUNC); in malidp550_enable_memwrite()
855 hwdev->mw_state = MW_ONESHOT; in malidp550_enable_memwrite()
857 malidp_hw_write(hwdev, fmt_id, base + MALIDP_MW_FORMAT); in malidp550_enable_memwrite()
860 malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW); in malidp550_enable_memwrite()
861 malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH); in malidp550_enable_memwrite()
862 malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE); in malidp550_enable_memwrite()
865 malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW); in malidp550_enable_memwrite()
866 malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH); in malidp550_enable_memwrite()
867 malidp_hw_write(hwdev, pitches[0], base + MALIDP_MW_P1_STRIDE); in malidp550_enable_memwrite()
873 malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h), in malidp550_enable_memwrite()
875 malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, in malidp550_enable_memwrite()
882 malidp_hw_write(hwdev, rgb2yuv_coeffs[i], in malidp550_enable_memwrite()
890 static void malidp550_disable_memwrite(struct malidp_hw_device *hwdev) in malidp550_disable_memwrite() argument
892 u32 base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK); in malidp550_disable_memwrite()
894 malidp_hw_clearbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN, in malidp550_disable_memwrite()
896 malidp_hw_clearbits(hwdev, MALIDP_SCALE_ENGINE_EN, base + MALIDP_DE_DISPLAY_FUNC); in malidp550_disable_memwrite()
899 static int malidp650_query_hw(struct malidp_hw_device *hwdev) in malidp650_query_hw() argument
901 u32 conf = malidp_hw_read(hwdev, MALIDP550_CONFIG_ID); in malidp650_query_hw()
904 hwdev->min_line_size = 4; in malidp650_query_hw()
910 hwdev->max_line_size = 0; in malidp650_query_hw()
913 hwdev->max_line_size = SZ_4K; in malidp650_query_hw()
918 hwdev->max_line_size = 2560; in malidp650_query_hw()
923 hwdev->rotation_memory[0] = hwdev->rotation_memory[1] = rsize * SZ_1K; in malidp650_query_hw()
1149 static void malidp_hw_clear_irq(struct malidp_hw_device *hwdev, u8 block, u32 irq) in malidp_hw_clear_irq() argument
1151 u32 base = malidp_get_block_base(hwdev, block); in malidp_hw_clear_irq()
1153 if (hwdev->hw->map.features & MALIDP_REGMAP_HAS_CLEARIRQ) in malidp_hw_clear_irq()
1154 malidp_hw_write(hwdev, irq, base + MALIDP_REG_CLEARIRQ); in malidp_hw_clear_irq()
1156 malidp_hw_write(hwdev, irq, base + MALIDP_REG_STATUS); in malidp_hw_clear_irq()
1163 struct malidp_hw_device *hwdev; in malidp_de_irq() local
1169 hwdev = malidp->dev; in malidp_de_irq()
1170 hw = hwdev->hw; in malidp_de_irq()
1178 if (hwdev->pm_suspended) in malidp_de_irq()
1182 dc_status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS); in malidp_de_irq()
1184 malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, dc_status); in malidp_de_irq()
1196 status = malidp_hw_read(hwdev, MALIDP_REG_STATUS); in malidp_de_irq()
1200 mask = malidp_hw_read(hwdev, MALIDP_REG_MASKIRQ); in malidp_de_irq()
1212 malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, status); in malidp_de_irq()
1227 void malidp_de_irq_hw_init(struct malidp_hw_device *hwdev) in malidp_de_irq_hw_init() argument
1230 malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1231 malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1232 malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1233 malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_hw_init()
1236 malidp_hw_enable_irq(hwdev, MALIDP_DC_BLOCK, in malidp_de_irq_hw_init()
1237 hwdev->hw->map.dc_irq_map.irq_mask); in malidp_de_irq_hw_init()
1240 malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK, in malidp_de_irq_hw_init()
1241 hwdev->hw->map.de_irq_map.irq_mask); in malidp_de_irq_hw_init()
1247 struct malidp_hw_device *hwdev = malidp->dev; in malidp_de_irq_init() local
1251 malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_init()
1252 malidp_hw_clear_irq(hwdev, MALIDP_DE_BLOCK, 0xffffffff); in malidp_de_irq_init()
1253 malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_init()
1254 malidp_hw_clear_irq(hwdev, MALIDP_DC_BLOCK, 0xffffffff); in malidp_de_irq_init()
1264 malidp_de_irq_hw_init(hwdev); in malidp_de_irq_init()
1269 void malidp_de_irq_fini(struct malidp_hw_device *hwdev) in malidp_de_irq_fini() argument
1271 malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK, in malidp_de_irq_fini()
1272 hwdev->hw->map.de_irq_map.irq_mask); in malidp_de_irq_fini()
1273 malidp_hw_disable_irq(hwdev, MALIDP_DC_BLOCK, in malidp_de_irq_fini()
1274 hwdev->hw->map.dc_irq_map.irq_mask); in malidp_de_irq_fini()
1281 struct malidp_hw_device *hwdev = malidp->dev; in malidp_se_irq() local
1282 struct malidp_hw *hw = hwdev->hw; in malidp_se_irq()
1291 if (hwdev->pm_suspended) in malidp_se_irq()
1294 status = malidp_hw_read(hwdev, hw->map.se_base + MALIDP_REG_STATUS); in malidp_se_irq()
1303 mask = malidp_hw_read(hwdev, hw->map.se_base + MALIDP_REG_MASKIRQ); in malidp_se_irq()
1307 switch (hwdev->mw_state) { in malidp_se_irq()
1314 hwdev->mw_state = MW_NOT_ENABLED; in malidp_se_irq()
1321 hw->disable_memwrite(hwdev); in malidp_se_irq()
1327 status = malidp_hw_read(hwdev, hw->map.dc_base + MALIDP_REG_STATUS); in malidp_se_irq()
1330 hw->set_config_valid(hwdev, 1); in malidp_se_irq()
1335 malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, status); in malidp_se_irq()
1340 void malidp_se_irq_hw_init(struct malidp_hw_device *hwdev) in malidp_se_irq_hw_init() argument
1343 malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_hw_init()
1344 malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_hw_init()
1346 malidp_hw_enable_irq(hwdev, MALIDP_SE_BLOCK, in malidp_se_irq_hw_init()
1347 hwdev->hw->map.se_irq_map.irq_mask); in malidp_se_irq_hw_init()
1358 struct malidp_hw_device *hwdev = malidp->dev; in malidp_se_irq_init() local
1362 malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_init()
1363 malidp_hw_clear_irq(hwdev, MALIDP_SE_BLOCK, 0xffffffff); in malidp_se_irq_init()
1373 hwdev->mw_state = MW_NOT_ENABLED; in malidp_se_irq_init()
1374 malidp_se_irq_hw_init(hwdev); in malidp_se_irq_init()
1379 void malidp_se_irq_fini(struct malidp_hw_device *hwdev) in malidp_se_irq_fini() argument
1381 malidp_hw_disable_irq(hwdev, MALIDP_SE_BLOCK, in malidp_se_irq_fini()
1382 hwdev->hw->map.se_irq_map.irq_mask); in malidp_se_irq_fini()