Lines Matching refs:UvdLevel

1573 		table->UvdLevel[count].MinVoltage = 0;  in fiji_populate_smc_uvd_level()
1574 		table->UvdLevel[count].VclkFrequency = mm_table->entries[count].vclk;  in fiji_populate_smc_uvd_level()
1575 		table->UvdLevel[count].DclkFrequency = mm_table->entries[count].dclk;  in fiji_populate_smc_uvd_level()
1576 		table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc *  in fiji_populate_smc_uvd_level()
1578 		table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc -  in fiji_populate_smc_uvd_level()
1580 		table->UvdLevel[count].MinVoltage |= 1 << PHASES_SHIFT;  in fiji_populate_smc_uvd_level()
1584 				table->UvdLevel[count].VclkFrequency, &dividers);  in fiji_populate_smc_uvd_level()
1588 		table->UvdLevel[count].VclkDivider = (uint8_t)dividers.pll_post_divider;  in fiji_populate_smc_uvd_level()
1591 				table->UvdLevel[count].DclkFrequency, &dividers);  in fiji_populate_smc_uvd_level()
1595 		table->UvdLevel[count].DclkDivider = (uint8_t)dividers.pll_post_divider;  in fiji_populate_smc_uvd_level()
1597 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].VclkFrequency);  in fiji_populate_smc_uvd_level()
1598 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].DclkFrequency);  in fiji_populate_smc_uvd_level()
1599 		CONVERT_FROM_HOST_TO_SMC_UL(table->UvdLevel[count].MinVoltage);  in fiji_populate_smc_uvd_level()