41 #define FEATURE_MASK(feature) (1ULL << feature)  macro
43 	FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) | \
44 	FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT)	 | \
45 	FEATURE_MASK(FEATURE_DPM_GFX_PACE_BIT)	 | \
46 	FEATURE_MASK(FEATURE_DPM_UCLK_BIT)	 | \
47 	FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)	 | \
48 	FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT)	 | \
49 	FEATURE_MASK(FEATURE_DPM_LINK_BIT)	 | \
50 	FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT))
329 	*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT)  in navi10_get_allowed_feature_mask()
330 				| FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT)  in navi10_get_allowed_feature_mask()
331 				| FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)  in navi10_get_allowed_feature_mask()
332 				| FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT)  in navi10_get_allowed_feature_mask()
333 				| FEATURE_MASK(FEATURE_DPM_LINK_BIT)  in navi10_get_allowed_feature_mask()
334 				| FEATURE_MASK(FEATURE_GFX_ULV_BIT)  in navi10_get_allowed_feature_mask()
335 				| FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT)  in navi10_get_allowed_feature_mask()
336 				| FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)  in navi10_get_allowed_feature_mask()
337 				| FEATURE_MASK(FEATURE_PPT_BIT)  in navi10_get_allowed_feature_mask()
338 				| FEATURE_MASK(FEATURE_TDC_BIT)  in navi10_get_allowed_feature_mask()
339 				| FEATURE_MASK(FEATURE_GFX_EDC_BIT)  in navi10_get_allowed_feature_mask()
340 				| FEATURE_MASK(FEATURE_VR0HOT_BIT)  in navi10_get_allowed_feature_mask()
341 				| FEATURE_MASK(FEATURE_FAN_CONTROL_BIT)  in navi10_get_allowed_feature_mask()
342 				| FEATURE_MASK(FEATURE_THERMAL_BIT)  in navi10_get_allowed_feature_mask()
343 				| FEATURE_MASK(FEATURE_LED_DISPLAY_BIT)  in navi10_get_allowed_feature_mask()
344 				| FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)  in navi10_get_allowed_feature_mask()
345 				| FEATURE_MASK(FEATURE_DS_GFXCLK_BIT)  in navi10_get_allowed_feature_mask()
346 				| FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)  in navi10_get_allowed_feature_mask()
347 				| FEATURE_MASK(FEATURE_FW_DSTATE_BIT)  in navi10_get_allowed_feature_mask()
348 				| FEATURE_MASK(FEATURE_BACO_BIT)  in navi10_get_allowed_feature_mask()
349 				| FEATURE_MASK(FEATURE_ACDC_BIT)  in navi10_get_allowed_feature_mask()
350 				| FEATURE_MASK(FEATURE_GFX_SS_BIT)  in navi10_get_allowed_feature_mask()
351 				| FEATURE_MASK(FEATURE_APCC_DFLL_BIT)  in navi10_get_allowed_feature_mask()
352 				| FEATURE_MASK(FEATURE_FW_CTF_BIT);  in navi10_get_allowed_feature_mask()
355 		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT)  in navi10_get_allowed_feature_mask()
356 				| FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)  in navi10_get_allowed_feature_mask()
357 				| FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT);  in navi10_get_allowed_feature_mask()
360 		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT);  in navi10_get_allowed_feature_mask()
362 		*(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_FW_DSTATE_BIT);  in navi10_get_allowed_feature_mask()
366 		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);  in navi10_get_allowed_feature_mask()
369 		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);  in navi10_get_allowed_feature_mask()
372 		*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT)  in navi10_get_allowed_feature_mask()
373 				| FEATURE_MASK(FEATURE_JPEG_PG_BIT);  in navi10_get_allowed_feature_mask()
381 					~(FEATURE_MASK(FEATURE_DPM_UCLK_BIT)  in navi10_get_allowed_feature_mask()
382 					  | FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)  in navi10_get_allowed_feature_mask()
383 					  | FEATURE_MASK(FEATURE_MEM_MVDD_SCALING_BIT));  in navi10_get_allowed_feature_mask()
385 					~FEATURE_MASK(FEATURE_DS_SOCCLK_BIT);  in navi10_get_allowed_feature_mask()