843 		entries[i].vddc = dep_sclk_table->entries[i].vddc;  in smu7_odn_initial_default_setting()
855 		entries[i].vddc = dep_mclk_table->entries[i].vddc;  in smu7_odn_initial_default_setting()
881 		|| min_vddc > dep_sclk_table->entries[0].vddc)  in smu7_setup_voltage_range_from_vbios()
882 		min_vddc = dep_sclk_table->entries[0].vddc;  in smu7_setup_voltage_range_from_vbios()
885 		|| max_vddc < dep_sclk_table->entries[dep_sclk_table->count-1].vddc)  in smu7_setup_voltage_range_from_vbios()
886 		max_vddc = dep_sclk_table->entries[dep_sclk_table->count-1].vddc;  in smu7_setup_voltage_range_from_vbios()
926 		if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) {  in smu7_check_dpm_table_updated()
935 		if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) {  in smu7_check_dpm_table_updated()
1697 	uint16_t vddc = 0;  in smu7_get_evv_voltages()  local
1762 							sclk, vv_id, &vddc) == 0) {  in smu7_get_evv_voltages()
1763 					if (vddc >= 2000 || vddc == 0)  in smu7_get_evv_voltages()
1771 				if (vddc != 0 && vddc != vv_id) {  in smu7_get_evv_voltages()
1772 					data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = (uint16_t)(vddc);  in smu7_get_evv_voltages()
1832 		uint16_t *vddc)  in smu7_patch_clock_voltage_limits_with_vddc_leakage()  argument
1836 	smu7_patch_ppt_v1_with_vdd_leakage(hwmgr, (uint16_t *)vddc, leakage_table);  in smu7_patch_clock_voltage_limits_with_vddc_leakage()
1837 	hwmgr->dyn_state.max_clock_voltage_on_dc.vddc =  in smu7_patch_clock_voltage_limits_with_vddc_leakage()
1838 			table_info->max_clock_voltage_on_dc.vddc;  in smu7_patch_clock_voltage_limits_with_vddc_leakage()
1867 			sclk_table->entries[entry_id].vddc =  in smu7_patch_voltage_dependency_tables_with_lookup_table()
1874 		mclk_table->entries[entry_id].vddc =  in smu7_patch_voltage_dependency_tables_with_lookup_table()
1880 		mm_table->entries[entry_id].vddc =  in smu7_patch_voltage_dependency_tables_with_lookup_table()
1944 			sclk_table->entries[entry_id].vddc =  in smu7_calc_voltage_dependency_tables()
1953 				v_record.us_vdd = mclk_table->entries[entry_id].vddc +  in smu7_calc_voltage_dependency_tables()
1956 				v_record.us_vdd = mclk_table->entries[entry_id].vddc +  in smu7_calc_voltage_dependency_tables()
1978 				v_record.us_vdd = mm_table->entries[entry_id].vddc +  in smu7_calc_mm_voltage_dependency_table()
1981 				v_record.us_vdd = mm_table->entries[entry_id].vddc +  in smu7_calc_mm_voltage_dependency_table()
2042 				&(data->vddc_leakage), &table_info->max_clock_voltage_on_dc.vddc);  in smu7_complete_dependency_tables()
2098 	table_info->max_clock_voltage_on_ac.vddc =  in smu7_set_private_data_based_on_pptable_v1()
2099 		allowed_sclk_vdd_table->entries[allowed_sclk_vdd_table->count - 1].vddc;  in smu7_set_private_data_based_on_pptable_v1()
2105 	hwmgr->dyn_state.max_clock_voltage_on_ac.vddc = table_info->max_clock_voltage_on_ac.vddc;  in smu7_set_private_data_based_on_pptable_v1()
2364 	uint32_t vddc, vddci;  in smu7_patch_limits_vddc()  local
2368 		vddc = tab->vddc;  in smu7_patch_limits_vddc()
2369 		smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddc,  in smu7_patch_limits_vddc()
2371 		tab->vddc = vddc;  in smu7_patch_limits_vddc()
2384 	uint32_t vddc;  in smu7_patch_cac_vddc()  local
2389 			vddc = (uint32_t)(tab->entries[i].Vddc);  in smu7_patch_cac_vddc()
2390 			smu7_patch_ppt_v0_with_vdd_leakage(hwmgr, &vddc, &data->vddc_leakage);  in smu7_patch_cac_vddc()
2391 			tab->entries[i].Vddc = (uint16_t)vddc;  in smu7_patch_cac_vddc()
2483 	hwmgr->dyn_state.max_clock_voltage_on_ac.vddc =  in smu7_set_private_data_based_on_pptable_v0()
2509 	uint16_t virtual_voltage_id, vddc, vddci, efuse_voltage_id;  in smu7_get_elb_voltages()  local
2516 			if (atomctrl_get_leakage_vddc_base_on_leakage(hwmgr, &vddc, &vddci,  in smu7_get_elb_voltages()
2519 				if (vddc != 0 && vddc != virtual_voltage_id) {  in smu7_get_elb_voltages()
2520 					data->vddc_leakage.actual_voltage[data->vddc_leakage.count] = vddc;  in smu7_get_elb_voltages()
4506 					odn_sclk_table->entries[i].vddc);  in smu7_print_clock_levels()
4515 					odn_mclk_table->entries[i].vddc);  in smu7_print_clock_levels()
4901 			podn_dpm_table_in_backend->entries[input_level].vddc = input_vol;  in smu7_odn_edit_dpm_table()
4902 			podn_vdd_dep_in_backend->entries[input_level].vddc = input_vol;  in smu7_odn_edit_dpm_table()