Lines Matching refs:engineClock
798 if (hwmgr->platform_descriptor.overdriveLimit.engineClock == 0) in smu7_setup_dpm_tables_v1()
799 hwmgr->platform_descriptor.overdriveLimit.engineClock = dep_sclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1()
2588 hwmgr->platform_descriptor.clockStep.engineClock = 500; in smu7_hwmgr_backend_init()
2924 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()
2947 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()
2971 if (sclk < minimum_clocks.engineClock) in smu7_apply_state_adjust_rules()
2972 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()
2973 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()
4523 hwmgr->platform_descriptor.overdriveLimit.engineClock/100); in smu7_print_clock_levels()
4824 hwmgr->platform_descriptor.overdriveLimit.engineClock < clk) { in smu7_check_clk_voltage_valid()
4827 hwmgr->platform_descriptor.overdriveLimit.engineClock/100); in smu7_check_clk_voltage_valid()