Lines Matching refs:powerplay_table
49 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_table_offset() argument
53 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_vce_table_offset()
56 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_vce_table_offset()
73 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_offset() argument
76 powerplay_table); in get_vce_clock_info_array_offset()
85 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_info_array_size() argument
88 powerplay_table); in get_vce_clock_info_array_size()
93 (((unsigned long) powerplay_table) + table_offset); in get_vce_clock_info_array_size()
101 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_voltage_limit_table_offset() argument
104 powerplay_table); in get_vce_clock_voltage_limit_table_offset()
108 powerplay_table); in get_vce_clock_voltage_limit_table_offset()
114 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_clock_voltage_limit_table_size() argument
116 uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table); in get_vce_clock_voltage_limit_table_size()
121 …(const ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *)(((unsigned long) powerplay_table) + table_offse… in get_vce_clock_voltage_limit_table_size()
128 …et_vce_state_table_offset(struct pp_hwmgr *hwmgr, const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_state_table_offset() argument
130 uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table); in get_vce_state_table_offset()
133 return table_offset + get_vce_clock_voltage_limit_table_size(hwmgr, powerplay_table); in get_vce_state_table_offset()
140 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_vce_state_table() argument
142 uint16_t table_offset = get_vce_state_table_offset(hwmgr, powerplay_table); in get_vce_state_table()
145 return (const ATOM_PPLIB_VCE_State_Table *)(((unsigned long) powerplay_table) + table_offset); in get_vce_state_table()
151 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_table_offset() argument
155 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_uvd_table_offset()
158 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_uvd_table_offset()
173 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_clock_info_array_offset() argument
176 powerplay_table); in get_uvd_clock_info_array_offset()
184 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_clock_info_array_size() argument
187 powerplay_table); in get_uvd_clock_info_array_size()
192 (((unsigned long) powerplay_table) in get_uvd_clock_info_array_size()
203 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_uvd_clock_voltage_limit_table_offset() argument
206 powerplay_table); in get_uvd_clock_voltage_limit_table_offset()
210 get_uvd_clock_info_array_size(hwmgr, powerplay_table); in get_uvd_clock_voltage_limit_table_offset()
216 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_samu_table_offset() argument
220 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_samu_table_offset()
223 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_samu_table_offset()
240 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_samu_clock_voltage_limit_table_offset() argument
243 powerplay_table); in get_samu_clock_voltage_limit_table_offset()
252 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_acp_table_offset() argument
256 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_acp_table_offset()
259 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_acp_table_offset()
276 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_acp_clock_voltage_limit_table_offset() argument
278 uint16_t tableOffset = get_acp_table_offset(hwmgr, powerplay_table); in get_acp_clock_voltage_limit_table_offset()
288 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_cacp_tdp_table_offset() argument
292 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_cacp_tdp_table_offset()
295 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_cacp_tdp_table_offset()
339 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_sclk_vdd_gfx_table_offset() argument
343 if (le16_to_cpu(powerplay_table->usTableSize) >= in get_sclk_vdd_gfx_table_offset()
346 (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in get_sclk_vdd_gfx_table_offset()
364 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in get_sclk_vdd_gfx_clock_voltage_dependency_table_offset() argument
366 uint16_t tableOffset = get_sclk_vdd_gfx_table_offset(hwmgr, powerplay_table); in get_sclk_vdd_gfx_clock_voltage_dependency_table_offset()
869 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); in pp_tables_get_num_of_entries() local
871 if (powerplay_table == NULL) in pp_tables_get_num_of_entries()
874 if (powerplay_table->sHeader.ucTableFormatRevision >= 6) { in pp_tables_get_num_of_entries()
875 pstate_arrays = (StateArray *)(((unsigned long)powerplay_table) + in pp_tables_get_num_of_entries()
876 le16_to_cpu(powerplay_table->usStateArrayOffset)); in pp_tables_get_num_of_entries()
880 *num_of_entries = (unsigned long)(powerplay_table->ucNumStates); in pp_tables_get_num_of_entries()
894 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); in pp_tables_get_entry() local
904 if (powerplay_table == NULL) in pp_tables_get_entry()
909 if (powerplay_table->sHeader.ucTableFormatRevision >= 6) { in pp_tables_get_entry()
910 pstate_arrays = (StateArray *)(((unsigned long)powerplay_table) + in pp_tables_get_entry()
911 le16_to_cpu(powerplay_table->usStateArrayOffset)); in pp_tables_get_entry()
917 pclock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) + in pp_tables_get_entry()
918 le16_to_cpu(powerplay_table->usClockInfoArrayOffset)); in pp_tables_get_entry()
920 pnon_clock_arrays = (NonClockInfoArray *)(((unsigned long)powerplay_table) + in pp_tables_get_entry()
921 le16_to_cpu(powerplay_table->usNonClockInfoArrayOffset)); in pp_tables_get_entry()
937 if (entry_index > powerplay_table->ucNumStates) in pp_tables_get_entry()
940 pstate_entry = (ATOM_PPLIB_STATE *)((unsigned long)powerplay_table + in pp_tables_get_entry()
941 le16_to_cpu(powerplay_table->usStateArrayOffset) + in pp_tables_get_entry()
942 entry_index * powerplay_table->ucStateEntrySize); in pp_tables_get_entry()
944 pnon_clock_info = (ATOM_PPLIB_NONCLOCK_INFO *)((unsigned long)powerplay_table + in pp_tables_get_entry()
945 le16_to_cpu(powerplay_table->usNonClockInfoArrayOffset) + in pp_tables_get_entry()
947 powerplay_table->ucNonClockSize); in pp_tables_get_entry()
950 powerplay_table->ucNonClockSize, in pp_tables_get_entry()
953 for (i = 0; i < powerplay_table->ucStateEntrySize-1; i++) { in pp_tables_get_entry()
954 const void *pclock_info = (const void *)((unsigned long)powerplay_table + in pp_tables_get_entry()
955 le16_to_cpu(powerplay_table->usClockInfoArrayOffset) + in pp_tables_get_entry()
957 powerplay_table->ucClockInfoSize); in pp_tables_get_entry()
976 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table in init_powerplay_tables() argument
985 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_thermal_controller() argument
991 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, in init_overdrive_limits_V1_4() argument
1014 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table, in init_overdrive_limits_V2_1() argument
1020 if (le16_to_cpu(powerplay_table->usTableSize) < in init_overdrive_limits_V2_1()
1024 powerplay_table3 = (const ATOM_PPLIB_POWERPLAYTABLE3 *)powerplay_table; in init_overdrive_limits_V2_1()
1029 header = (ATOM_PPLIB_EXTENDEDHEADER *)(((unsigned long) powerplay_table) + in init_overdrive_limits_V2_1()
1044 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_overdrive_limits() argument
1069 powerplay_table, in init_overdrive_limits()
1075 powerplay_table, in init_overdrive_limits()
1203 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_clock_voltage_dependency() argument
1226 hwmgr, powerplay_table); in init_clock_voltage_dependency()
1228 powerplay_table); in init_clock_voltage_dependency()
1231 (((unsigned long) powerplay_table) + in init_clock_voltage_dependency()
1235 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1241 uvd_clock_info_array_offset = get_uvd_clock_info_array_offset(hwmgr, powerplay_table); in init_clock_voltage_dependency()
1242 table_offset = get_uvd_clock_voltage_limit_table_offset(hwmgr, powerplay_table); in init_clock_voltage_dependency()
1246 (((unsigned long) powerplay_table) + in init_clock_voltage_dependency()
1250 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1256 powerplay_table); in init_clock_voltage_dependency()
1261 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1267 powerplay_table); in init_clock_voltage_dependency()
1272 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1277 table_offset = get_cacp_tdp_table_offset(hwmgr, powerplay_table); in init_clock_voltage_dependency()
1279 UCHAR rev_id = *(UCHAR *)(((unsigned long)powerplay_table) + table_offset); in init_clock_voltage_dependency()
1284 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1293 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1300 if (le16_to_cpu(powerplay_table->usTableSize) >= in init_clock_voltage_dependency()
1303 (const ATOM_PPLIB_POWERPLAYTABLE4 *)powerplay_table; in init_clock_voltage_dependency()
1357 powerplay_table); in init_clock_voltage_dependency()
1361 (((unsigned long) powerplay_table) + table_offset); in init_clock_voltage_dependency()
1430 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_dpm2_parameters() argument
1434 if (le16_to_cpu(powerplay_table->usTableSize) >= in init_dpm2_parameters()
1437 (const ATOM_PPLIB_POWERPLAYTABLE5 *)powerplay_table; in init_dpm2_parameters()
1486 (((unsigned long)powerplay_table) + in init_dpm2_parameters()
1493 (((unsigned long)powerplay_table) + table_offset); in init_dpm2_parameters()
1504 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table) in init_phase_shedding_table() argument
1506 if (le16_to_cpu(powerplay_table->usTableSize) >= in init_phase_shedding_table()
1509 (const ATOM_PPLIB_POWERPLAYTABLE4 *)powerplay_table; in init_phase_shedding_table()
1565 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table = get_powerplay_table(hwmgr); in get_vce_state_table_entry() local
1567 const ATOM_PPLIB_VCE_State_Table *vce_state_table = get_vce_state_table(hwmgr, powerplay_table); in get_vce_state_table_entry()
1569 …signed short vce_clock_info_array_offset = get_vce_clock_info_array_offset(hwmgr, powerplay_table); in get_vce_state_table_entry()
1571 …*vce_clock_info_array = (const VCEClockInfoArray *)(((unsigned long) powerplay_table) + vce_clock_… in get_vce_state_table_entry()
1573 const ClockInfoArray *clock_arrays = (ClockInfoArray *)(((unsigned long)powerplay_table) + in get_vce_state_table_entry()
1574 le16_to_cpu(powerplay_table->usClockInfoArrayOffset)); in get_vce_state_table_entry()
1596 const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; in pp_tables_initialize() local
1603 powerplay_table = get_powerplay_table(hwmgr); in pp_tables_initialize()
1605 result = init_powerplay_tables(hwmgr, powerplay_table); in pp_tables_initialize()
1611 le32_to_cpu(powerplay_table->ulPlatformCaps)); in pp_tables_initialize()
1616 result = init_thermal_controller(hwmgr, powerplay_table); in pp_tables_initialize()
1621 result = init_overdrive_limits(hwmgr, powerplay_table); in pp_tables_initialize()
1627 powerplay_table); in pp_tables_initialize()
1632 result = init_dpm2_parameters(hwmgr, powerplay_table); in pp_tables_initialize()
1637 result = init_phase_shedding_table(hwmgr, powerplay_table); in pp_tables_initialize()