182 		mutex_unlock(&hwmgr->smu_lock);  in pp_late_init()
361 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_force_performance_level()
377 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_performance_level()
395 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_sclk()
413 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_mclk()
430 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_powergate_vce()
446 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_powergate_uvd()
460 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_dispatch_tasks()
495 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_current_power_state()
513 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_fan_control_mode()
530 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_fan_control_mode()
548 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_fan_speed_percent()
567 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_fan_speed_percent()
584 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_fan_speed_rpm()
602 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_fan_speed_rpm()
641 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_pp_num_states()
656 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_pp_table()
706 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_pp_table()
709 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_pp_table()
734 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_force_clock_level()
753 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_print_clock_levels()
771 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_sclk_od()
790 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_sclk_od()
808 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_get_mclk_od()
826 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_set_mclk_od()
855 		mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_read_sensor()
908 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_power_profile_mode()
974 	mutex_unlock(&hwmgr->smu_lock);  in pp_dpm_switch_power_profile()
1007 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_power_limit()
1030 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_power_limit()
1045 	mutex_unlock(&hwmgr->smu_lock);  in pp_display_configuration_change()
1060 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_display_power_level()
1089 		mutex_unlock(&hwmgr->smu_lock);  in pp_get_current_clocks()
1112 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_current_clocks()
1129 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_clock_by_type()
1145 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_clock_by_type_with_latency()
1163 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_clock_by_type_with_voltage()
1179 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_watermarks_for_clocks_ranges()
1195 	mutex_unlock(&hwmgr->smu_lock);  in pp_display_clock_voltage_request()
1216 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_display_mode_validation_clocks()
1325 	mutex_unlock(&hwmgr->smu_lock);  in pp_notify_smu_enable_pwe()
1343 	mutex_unlock(&hwmgr->smu_lock);  in pp_enable_mgpu_fan_boost()
1362 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_min_deep_sleep_dcefclk()
1381 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_hard_min_dcefclk_by_freq()
1400 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_hard_min_fclk_by_freq()
1415 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_active_display_count()
1432 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_asic_baco_capability()
1449 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_asic_baco_state()
1466 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_asic_baco_state()
1486 	mutex_unlock(&hwmgr->smu_lock);  in pp_get_ppfeature_status()
1506 	mutex_unlock(&hwmgr->smu_lock);  in pp_set_ppfeature_status()
1526 	mutex_unlock(&hwmgr->smu_lock);  in pp_asic_reset_mode_2()
1546 	mutex_unlock(&hwmgr->smu_lock);  in pp_smu_i2c_bus_access()