179 		mutex_lock(&hwmgr->smu_lock);  in pp_late_init()
357 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_force_performance_level()
375 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_performance_level()
393 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_sclk()
411 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_mclk()
428 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_powergate_vce()
444 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_powergate_uvd()
458 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_dispatch_tasks()
474 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_current_power_state()
511 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_set_fan_control_mode()
528 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_fan_control_mode()
546 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_set_fan_speed_percent()
565 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_fan_speed_percent()
582 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_fan_speed_rpm()
600 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_set_fan_speed_rpm()
617 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_pp_num_states()
653 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_pp_table()
684 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_set_pp_table()
732 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_force_clock_level()
751 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_print_clock_levels()
769 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_sclk_od()
788 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_set_sclk_od()
806 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_get_mclk_od()
824 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_set_mclk_od()
853 		mutex_lock(&hwmgr->smu_lock);  in pp_dpm_read_sensor()
906 	mutex_lock(&hwmgr->smu_lock);  in pp_set_power_profile_mode()
958 	mutex_lock(&hwmgr->smu_lock);  in pp_dpm_switch_power_profile()
1004 	mutex_lock(&hwmgr->smu_lock);  in pp_set_power_limit()
1018 	mutex_lock(&hwmgr->smu_lock);  in pp_get_power_limit()
1043 	mutex_lock(&hwmgr->smu_lock);  in pp_display_configuration_change()
1058 	mutex_lock(&hwmgr->smu_lock);  in pp_get_display_power_level()
1075 	mutex_lock(&hwmgr->smu_lock);  in pp_get_current_clocks()
1127 	mutex_lock(&hwmgr->smu_lock);  in pp_get_clock_by_type()
1143 	mutex_lock(&hwmgr->smu_lock);  in pp_get_clock_by_type_with_latency()
1159 	mutex_lock(&hwmgr->smu_lock);  in pp_get_clock_by_type_with_voltage()
1176 	mutex_lock(&hwmgr->smu_lock);  in pp_set_watermarks_for_clocks_ranges()
1193 	mutex_lock(&hwmgr->smu_lock);  in pp_display_clock_voltage_request()
1211 	mutex_lock(&hwmgr->smu_lock);  in pp_get_display_mode_validation_clocks()
1323 	mutex_lock(&hwmgr->smu_lock);  in pp_notify_smu_enable_pwe()
1341 	mutex_lock(&hwmgr->smu_lock);  in pp_enable_mgpu_fan_boost()
1360 	mutex_lock(&hwmgr->smu_lock);  in pp_set_min_deep_sleep_dcefclk()
1379 	mutex_lock(&hwmgr->smu_lock);  in pp_set_hard_min_dcefclk_by_freq()
1398 	mutex_lock(&hwmgr->smu_lock);  in pp_set_hard_min_fclk_by_freq()
1413 	mutex_lock(&hwmgr->smu_lock);  in pp_set_active_display_count()
1430 	mutex_lock(&hwmgr->smu_lock);  in pp_get_asic_baco_capability()
1447 	mutex_lock(&hwmgr->smu_lock);  in pp_get_asic_baco_state()
1464 	mutex_lock(&hwmgr->smu_lock);  in pp_set_asic_baco_state()
1484 	mutex_lock(&hwmgr->smu_lock);  in pp_get_ppfeature_status()
1504 	mutex_lock(&hwmgr->smu_lock);  in pp_set_ppfeature_status()
1524 	mutex_lock(&hwmgr->smu_lock);  in pp_asic_reset_mode_2()
1544 	mutex_lock(&hwmgr->smu_lock);  in pp_smu_i2c_bus_access()