Lines Matching refs:infopacket
491 struct dc_info_packet *infopacket) in build_vrr_infopacket_data() argument
494 infopacket->sb[1] = 0x1A; in build_vrr_infopacket_data()
497 infopacket->sb[2] = 0x00; in build_vrr_infopacket_data()
500 infopacket->sb[3] = 0x00; in build_vrr_infopacket_data()
510 infopacket->sb[6] |= 0x01; in build_vrr_infopacket_data()
515 infopacket->sb[6] |= 0x02; in build_vrr_infopacket_data()
520 infopacket->sb[6] |= 0x04; in build_vrr_infopacket_data()
523 infopacket->sb[7] = (unsigned char)(vrr->min_refresh_in_uhz / 1000000); in build_vrr_infopacket_data()
528 infopacket->sb[8] = (unsigned char)(vrr->max_refresh_in_uhz / 1000000); in build_vrr_infopacket_data()
532 infopacket->sb[9] = 0; in build_vrr_infopacket_data()
533 infopacket->sb[10] = 0; in build_vrr_infopacket_data()
537 struct dc_info_packet *infopacket) in build_vrr_infopacket_fs2_data() argument
540 infopacket->valid = true; in build_vrr_infopacket_fs2_data()
542 infopacket->sb[6] |= 0x08; // PB6 = [Bit 3 = Native Color Active] in build_vrr_infopacket_fs2_data()
545 infopacket->sb[9] |= 0x04; // PB6 = [Bit 2 = Gamma 2.2 EOTF Active] in build_vrr_infopacket_fs2_data()
551 struct dc_info_packet *infopacket, in build_vrr_infopacket_header_v1() argument
561 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; in build_vrr_infopacket_header_v1()
564 infopacket->hb1 = 0x01; in build_vrr_infopacket_header_v1()
567 infopacket->hb2 = 0x08; in build_vrr_infopacket_header_v1()
578 infopacket->hb0 = 0x00; in build_vrr_infopacket_header_v1()
583 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; in build_vrr_infopacket_header_v1()
588 infopacket->hb2 = 0x1B; in build_vrr_infopacket_header_v1()
593 infopacket->hb3 = 0x04; in build_vrr_infopacket_header_v1()
600 struct dc_info_packet *infopacket, in build_vrr_infopacket_header_v2() argument
610 infopacket->hb0 = DC_HDMI_INFOFRAME_TYPE_SPD; in build_vrr_infopacket_header_v2()
613 infopacket->hb1 = 0x02; in build_vrr_infopacket_header_v2()
616 infopacket->hb2 = 0x09; in build_vrr_infopacket_header_v2()
627 infopacket->hb0 = 0x00; in build_vrr_infopacket_header_v2()
632 infopacket->hb1 = DC_HDMI_INFOFRAME_TYPE_SPD; in build_vrr_infopacket_header_v2()
637 infopacket->hb2 = 0x1B; in build_vrr_infopacket_header_v2()
642 infopacket->hb3 = 0x08; in build_vrr_infopacket_header_v2()
649 struct dc_info_packet *infopacket) in build_vrr_infopacket_checksum() argument
655 checksum += infopacket->hb0; in build_vrr_infopacket_checksum()
656 checksum += infopacket->hb1; in build_vrr_infopacket_checksum()
657 checksum += infopacket->hb2; in build_vrr_infopacket_checksum()
658 checksum += infopacket->hb3; in build_vrr_infopacket_checksum()
661 checksum += infopacket->sb[idx]; in build_vrr_infopacket_checksum()
664 infopacket->sb[0] = (unsigned char)(0x100 - checksum); in build_vrr_infopacket_checksum()
666 infopacket->valid = true; in build_vrr_infopacket_checksum()
671 struct dc_info_packet *infopacket) in build_vrr_infopacket_v1() argument
676 build_vrr_infopacket_header_v1(signal, infopacket, &payload_size); in build_vrr_infopacket_v1()
677 build_vrr_infopacket_data(vrr, infopacket); in build_vrr_infopacket_v1()
678 build_vrr_infopacket_checksum(&payload_size, infopacket); in build_vrr_infopacket_v1()
680 infopacket->valid = true; in build_vrr_infopacket_v1()
686 struct dc_info_packet *infopacket) in build_vrr_infopacket_v2() argument
690 build_vrr_infopacket_header_v2(signal, infopacket, &payload_size); in build_vrr_infopacket_v2()
691 build_vrr_infopacket_data(vrr, infopacket); in build_vrr_infopacket_v2()
693 build_vrr_infopacket_fs2_data(app_tf, infopacket); in build_vrr_infopacket_v2()
695 build_vrr_infopacket_checksum(&payload_size, infopacket); in build_vrr_infopacket_v2()
697 infopacket->valid = true; in build_vrr_infopacket_v2()
705 struct dc_info_packet *infopacket) in mod_freesync_build_vrr_infopacket() argument
717 build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket); in mod_freesync_build_vrr_infopacket()
722 build_vrr_infopacket_v1(stream->signal, vrr, infopacket); in mod_freesync_build_vrr_infopacket()