424 		return sysfs_show_str_val(buffer, dev->node_props.name);  in node_show()
430 			dev->node_props.cpu_cores_count);  in node_show()
432 			dev->node_props.simd_count);  in node_show()
434 			dev->node_props.mem_banks_count);  in node_show()
436 			dev->node_props.caches_count);  in node_show()
438 			dev->node_props.io_links_count);  in node_show()
440 			dev->node_props.cpu_core_id_base);  in node_show()
442 			dev->node_props.simd_id_base);  in node_show()
444 			dev->node_props.max_waves_per_simd);  in node_show()
446 			dev->node_props.lds_size_in_kb);  in node_show()
448 			dev->node_props.gds_size_in_kb);  in node_show()
450 			dev->node_props.num_gws);  in node_show()
452 			dev->node_props.wave_front_size);  in node_show()
454 			dev->node_props.array_count);  in node_show()
456 			dev->node_props.simd_arrays_per_engine);  in node_show()
458 			dev->node_props.cu_per_simd_array);  in node_show()
460 			dev->node_props.simd_per_cu);  in node_show()
462 			dev->node_props.max_slots_scratch_cu);  in node_show()
464 			dev->node_props.vendor_id);  in node_show()
466 			dev->node_props.device_id);  in node_show()
468 			dev->node_props.location_id);  in node_show()
470 			dev->node_props.drm_render_minor);  in node_show()
472 			dev->node_props.hive_id);  in node_show()
474 			dev->node_props.num_sdma_engines);  in node_show()
476 			dev->node_props.num_sdma_xgmi_engines);  in node_show()
483 			dev->node_props.capability |=  in node_show()
486 			dev->node_props.capability |=  in node_show()
493 			dev->node_props.capability |=  in node_show()
497 			dev->node_props.max_engine_clk_fcompute);  in node_show()
505 				dev->node_props.capability);  in node_show()
850 		if (dev->node_props.cpu_cores_count &&  in kfd_debug_print_topology()
851 				dev->node_props.simd_count) {  in kfd_debug_print_topology()
853 				dev->node_props.device_id,  in kfd_debug_print_topology()
854 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
855 		} else if (dev->node_props.cpu_cores_count)  in kfd_debug_print_topology()
857 		else if (dev->node_props.simd_count)  in kfd_debug_print_topology()
859 				dev->node_props.device_id,  in kfd_debug_print_topology()
860 				dev->node_props.vendor_id);  in kfd_debug_print_topology()
941 		if (dev->node_props.cpu_cores_count &&  in kfd_is_acpi_crat_invalid()
942 			dev->node_props.simd_count)  in kfd_is_acpi_crat_invalid()
1108 		    dev->node_props.cpu_cores_count)  in kfd_assign_gpu()
1111 		if (!dev->gpu && (dev->node_props.simd_count > 0)) {  in kfd_assign_gpu()
1270 	strncpy(dev->node_props.name, gpu->device_info->asic_name,  in kfd_topology_add_device()
1273 	dev->node_props.simd_arrays_per_engine =  in kfd_topology_add_device()
1276 	dev->node_props.vendor_id = gpu->pdev->vendor;  in kfd_topology_add_device()
1277 	dev->node_props.device_id = gpu->pdev->device;  in kfd_topology_add_device()
1278 	dev->node_props.location_id = pci_dev_id(gpu->pdev);  in kfd_topology_add_device()
1279 	dev->node_props.max_engine_clk_fcompute =  in kfd_topology_add_device()
1281 	dev->node_props.max_engine_clk_ccompute =  in kfd_topology_add_device()
1283 	dev->node_props.drm_render_minor =  in kfd_topology_add_device()
1286 	dev->node_props.hive_id = gpu->hive_id;  in kfd_topology_add_device()
1287 	dev->node_props.num_sdma_engines = gpu->device_info->num_sdma_engines;  in kfd_topology_add_device()
1288 	dev->node_props.num_sdma_xgmi_engines =  in kfd_topology_add_device()
1290 	dev->node_props.num_gws = (hws_gws_support &&  in kfd_topology_add_device()
1301 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 <<  in kfd_topology_add_device()
1312 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<  in kfd_topology_add_device()
1322 		dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<  in kfd_topology_add_device()
1336 		dev->node_props.capability |= HSA_CAP_ATS_PRESENT;  in kfd_topology_add_device()
1338 		dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;  in kfd_topology_add_device()
1346 		dev->node_props.simd_count =  in kfd_topology_add_device()
1348 		dev->node_props.max_waves_per_simd = 10;  in kfd_topology_add_device()
1354 		dev->node_props.capability |=  in kfd_topology_add_device()
1358 		dev->node_props.capability |= ((ctx->features & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?  in kfd_topology_add_device()
1361 		dev->node_props.capability |= (ctx->features != 0) ?  in kfd_topology_add_device()