115 	struct amdgpu_ring *ring;  in vcn_v2_0_sw_init()  local
244 	struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;  in vcn_v2_0_hw_init()  local
293 	struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;  in vcn_v2_0_hw_fini()  local
668 	struct amdgpu_ring *ring = &adev->vcn.inst->ring_jpeg;  in jpeg_v2_0_start()  local
930 	struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;  in vcn_v2_0_start_dpg_mode()  local
1056 	struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;  in vcn_v2_0_start()  local
1334 	struct amdgpu_ring *ring;  in vcn_v2_0_pause_dpg_mode()  local
1436 static uint64_t vcn_v2_0_dec_ring_get_rptr(struct amdgpu_ring *ring)  in vcn_v2_0_dec_ring_get_rptr()
1450 static uint64_t vcn_v2_0_dec_ring_get_wptr(struct amdgpu_ring *ring)  in vcn_v2_0_dec_ring_get_wptr()
1467 static void vcn_v2_0_dec_ring_set_wptr(struct amdgpu_ring *ring)  in vcn_v2_0_dec_ring_set_wptr()
1490 void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring)  in vcn_v2_0_dec_ring_insert_start()
1507 void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)  in vcn_v2_0_dec_ring_insert_end()
1522 void vcn_v2_0_dec_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)  in vcn_v2_0_dec_ring_insert_nop()
1543 void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,  in vcn_v2_0_dec_ring_emit_fence()
1580 void vcn_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,  in vcn_v2_0_dec_ring_emit_ib()
1599 void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,  in vcn_v2_0_dec_ring_emit_reg_wait()
1618 void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,  in vcn_v2_0_dec_ring_emit_vm_flush()
1633 void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring,  in vcn_v2_0_dec_ring_emit_wreg()
1656 static uint64_t vcn_v2_0_enc_ring_get_rptr(struct amdgpu_ring *ring)  in vcn_v2_0_enc_ring_get_rptr()
1673 static uint64_t vcn_v2_0_enc_ring_get_wptr(struct amdgpu_ring *ring)  in vcn_v2_0_enc_ring_get_wptr()
1697 static void vcn_v2_0_enc_ring_set_wptr(struct amdgpu_ring *ring)  in vcn_v2_0_enc_ring_set_wptr()
1726 void vcn_v2_0_enc_ring_emit_fence(struct amdgpu_ring *ring, u64 addr,  in vcn_v2_0_enc_ring_emit_fence()
1738 void vcn_v2_0_enc_ring_insert_end(struct amdgpu_ring *ring)  in vcn_v2_0_enc_ring_insert_end()
1751 void vcn_v2_0_enc_ring_emit_ib(struct amdgpu_ring *ring,  in vcn_v2_0_enc_ring_emit_ib()
1765 void vcn_v2_0_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,  in vcn_v2_0_enc_ring_emit_reg_wait()
1774 void vcn_v2_0_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,  in vcn_v2_0_enc_ring_emit_vm_flush()
1786 void vcn_v2_0_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)  in vcn_v2_0_enc_ring_emit_wreg()
1800 static uint64_t vcn_v2_0_jpeg_ring_get_rptr(struct amdgpu_ring *ring)  in vcn_v2_0_jpeg_ring_get_rptr()
1814 static uint64_t vcn_v2_0_jpeg_ring_get_wptr(struct amdgpu_ring *ring)  in vcn_v2_0_jpeg_ring_get_wptr()
1831 static void vcn_v2_0_jpeg_ring_set_wptr(struct amdgpu_ring *ring)  in vcn_v2_0_jpeg_ring_set_wptr()
1850 void vcn_v2_0_jpeg_ring_insert_start(struct amdgpu_ring *ring)  in vcn_v2_0_jpeg_ring_insert_start()
1868 void vcn_v2_0_jpeg_ring_insert_end(struct amdgpu_ring *ring)  in vcn_v2_0_jpeg_ring_insert_end()
1887 void vcn_v2_0_jpeg_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,  in vcn_v2_0_jpeg_ring_emit_fence()
1936 void vcn_v2_0_jpeg_ring_emit_ib(struct amdgpu_ring *ring,  in vcn_v2_0_jpeg_ring_emit_ib()
1987 void vcn_v2_0_jpeg_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,  in vcn_v2_0_jpeg_ring_emit_reg_wait()
2014 void vcn_v2_0_jpeg_ring_emit_vm_flush(struct amdgpu_ring *ring,  in vcn_v2_0_jpeg_ring_emit_vm_flush()
2029 void vcn_v2_0_jpeg_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val)  in vcn_v2_0_jpeg_ring_emit_wreg()
2047 void vcn_v2_0_jpeg_ring_nop(struct amdgpu_ring *ring, uint32_t count)  in vcn_v2_0_jpeg_ring_nop()
2095 static int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring)  in vcn_v2_0_dec_ring_test_ring()