2256 		struct amdgpu_ppm_table *ppm = adev->pm.dpm.dyn_state.ppm_table;  in si_populate_smc_tdp_limits()
2637 		&adev->pm.dpm.dyn_state.cac_leakage_table;  in si_get_cac_std_voltage_max_min()
3041 		&adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;  in si_get_vce_clock_voltage()
3239 	return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_mclk_values,  in btc_get_valid_mclk()
3246 	return btc_find_valid_clock(&adev->pm.dpm.dyn_state.valid_sclk_values,  in btc_get_valid_sclk()
3299 		if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > adev->pm.dpm.dyn_state.mclk_sclk_ratio)  in btc_adjust_clock_combinations()
3303 						      (adev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) /  in btc_adjust_clock_combinations()
3304 						      adev->pm.dpm.dyn_state.mclk_sclk_ratio);  in btc_adjust_clock_combinations()
3306 		if ((pl->sclk - pl->mclk) > adev->pm.dpm.dyn_state.sclk_mclk_delta)  in btc_adjust_clock_combinations()
3310 						      adev->pm.dpm.dyn_state.sclk_mclk_delta);  in btc_adjust_clock_combinations()
3325 		if ((*vddc - *vddci) > adev->pm.dpm.dyn_state.vddc_vddci_delta) {  in btc_apply_voltage_delta_rules()
3327 						       (*vddc - adev->pm.dpm.dyn_state.vddc_vddci_delta));  in btc_apply_voltage_delta_rules()
3331 		if ((*vddci - *vddc) > adev->pm.dpm.dyn_state.vddc_vddci_delta) {  in btc_apply_voltage_delta_rules()
3333 						       (*vddci - adev->pm.dpm.dyn_state.vddc_vddci_delta));  in btc_apply_voltage_delta_rules()
3486 		max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in si_apply_state_adjust_rules()
3488 		max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc;  in si_apply_state_adjust_rules()
3508 	btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in si_apply_state_adjust_rules()
3510 	btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in si_apply_state_adjust_rules()
3512 	btc_get_max_clock_from_voltage_dependency_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in si_apply_state_adjust_rules()
3614 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in si_apply_state_adjust_rules()
3617 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in si_apply_state_adjust_rules()
3620 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in si_apply_state_adjust_rules()
3623 		btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk,  in si_apply_state_adjust_rules()
3637 		if (ps->performance_levels[i].vddc > adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)  in si_apply_state_adjust_rules()
4439 						&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in si_construct_voltage_tables()
4460 						&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in si_construct_voltage_tables()
4556 							      &adev->pm.dpm.dyn_state.phase_shedding_limits_table)) {  in si_populate_smc_voltage_tables()
4618 	if (adev->pm.dpm.dyn_state.cac_leakage_table.entries) {  in si_get_std_voltage_value()
4620 			if (adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries == NULL)  in si_get_std_voltage_value()
4623 …for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {  in si_get_std_voltage_value()
4625 				    (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {  in si_get_std_voltage_value()
4627 					if ((u32)v_index < adev->pm.dpm.dyn_state.cac_leakage_table.count)  in si_get_std_voltage_value()
4629 							adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;  in si_get_std_voltage_value()
4632 …adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1]…  in si_get_std_voltage_value()
4638 …for (v_index = 0; (u32)v_index < adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count; v_index++) {  in si_get_std_voltage_value()
4640 					    (u16)adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.entries[v_index].v) {  in si_get_std_voltage_value()
4642 						if ((u32)v_index < adev->pm.dpm.dyn_state.cac_leakage_table.count)  in si_get_std_voltage_value()
4644 								adev->pm.dpm.dyn_state.cac_leakage_table.entries[v_index].vddc;  in si_get_std_voltage_value()
4647 …adev->pm.dpm.dyn_state.cac_leakage_table.entries[adev->pm.dpm.dyn_state.cac_leakage_table.count-1]…  in si_get_std_voltage_value()
4653 			if ((u32)voltage->index < adev->pm.dpm.dyn_state.cac_leakage_table.count)  in si_get_std_voltage_value()
4654 				*std_voltage = adev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc;  in si_get_std_voltage_value()
4908 						 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_populate_smc_initial_state()
4992 							 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_populate_smc_acpi_state()
5020 							 &adev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_populate_smc_acpi_state()
5532 						       &adev->pm.dpm.dyn_state.phase_shedding_limits_table,  in si_convert_power_level_to_smc()
5622 	for (i = 0; i < adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) {  in si_is_state_ulv_compatible()
5624 		    adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) {  in si_is_state_ulv_compatible()
5626 			    adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v)  in si_is_state_ulv_compatible()
6358 								&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk);  in si_patch_dependency_tables_based_on_leakage()
6362 								&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk);  in si_patch_dependency_tables_based_on_leakage()
6366 								&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk);  in si_patch_dependency_tables_based_on_leakage()
7201 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;  in si_parse_pplib_clock_info()
7202 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;  in si_parse_pplib_clock_info()
7203 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;  in si_parse_pplib_clock_info()
7204 		adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;  in si_parse_pplib_clock_info()
7350 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries =  in si_dpm_init()
7354 	if (!adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) {  in si_dpm_init()
7358 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4;  in si_dpm_init()
7359 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0;  in si_dpm_init()
7360 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0;  in si_dpm_init()
7361 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000;  in si_dpm_init()
7362 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720;  in si_dpm_init()
7363 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000;  in si_dpm_init()
7364 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810;  in si_dpm_init()
7365 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].clk = 72000;  in si_dpm_init()
7366 	adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[3].v = 900;  in si_dpm_init()
7448 	adev->pm.dpm.dyn_state.mclk_sclk_ratio = 4;  in si_dpm_init()
7449 	adev->pm.dpm.dyn_state.sclk_mclk_delta = 15000;  in si_dpm_init()
7450 	adev->pm.dpm.dyn_state.vddc_vddci_delta = 200;  in si_dpm_init()
7451 	adev->pm.dpm.dyn_state.valid_sclk_values.count = 0;  in si_dpm_init()
7452 	adev->pm.dpm.dyn_state.valid_sclk_values.values = NULL;  in si_dpm_init()
7453 	adev->pm.dpm.dyn_state.valid_mclk_values.count = 0;  in si_dpm_init()
7454 	adev->pm.dpm.dyn_state.valid_mclk_values.values = NULL;  in si_dpm_init()
7459 	if ((adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk == 0) ||  in si_dpm_init()
7460 	    (adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk == 0))  in si_dpm_init()
7461 		adev->pm.dpm.dyn_state.max_clock_voltage_on_dc =  in si_dpm_init()
7462 			adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in si_dpm_init()
7478 	kfree(adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries);  in si_dpm_fini()