379 				   struct amdgpu_ib *ib,  in sdma_v5_0_ring_emit_ib()  argument
391 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v5_0_ring_emit_ib()
392 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v5_0_ring_emit_ib()
393 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v5_0_ring_emit_ib()
936 	struct amdgpu_ib ib;  in sdma_v5_0_ring_test_ib()  local
952 	memset(&ib, 0, sizeof(ib));  in sdma_v5_0_ring_test_ib()
953 	r = amdgpu_ib_get(adev, NULL, 256, &ib);  in sdma_v5_0_ring_test_ib()
959 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v5_0_ring_test_ib()
961 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v5_0_ring_test_ib()
962 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v5_0_ring_test_ib()
963 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0);  in sdma_v5_0_ring_test_ib()
964 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v5_0_ring_test_ib()
965 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v5_0_ring_test_ib()
966 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v5_0_ring_test_ib()
967 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v5_0_ring_test_ib()
968 	ib.length_dw = 8;  in sdma_v5_0_ring_test_ib()
970 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v5_0_ring_test_ib()
993 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v5_0_ring_test_ib()
1011 static void sdma_v5_0_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v5_0_vm_copy_pte()  argument
1017 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v5_0_vm_copy_pte()
1019 	ib->ptr[ib->length_dw++] = bytes - 1;  in sdma_v5_0_vm_copy_pte()
1020 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v5_0_vm_copy_pte()
1021 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v5_0_vm_copy_pte()
1022 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v5_0_vm_copy_pte()
1023 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v5_0_vm_copy_pte()
1024 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v5_0_vm_copy_pte()
1040 static void sdma_v5_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v5_0_vm_write_pte()  argument
1046 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v5_0_vm_write_pte()
1048 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v5_0_vm_write_pte()
1049 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v5_0_vm_write_pte()
1050 	ib->ptr[ib->length_dw++] = ndw - 1;  in sdma_v5_0_vm_write_pte()
1052 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v5_0_vm_write_pte()
1053 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v5_0_vm_write_pte()
1070 static void sdma_v5_0_vm_set_pte_pde(struct amdgpu_ib *ib,  in sdma_v5_0_vm_set_pte_pde()  argument
1076 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE);  in sdma_v5_0_vm_set_pte_pde()
1077 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v5_0_vm_set_pte_pde()
1078 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v5_0_vm_set_pte_pde()
1079 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v5_0_vm_set_pte_pde()
1080 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v5_0_vm_set_pte_pde()
1081 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v5_0_vm_set_pte_pde()
1082 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v5_0_vm_set_pte_pde()
1083 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v5_0_vm_set_pte_pde()
1084 	ib->ptr[ib->length_dw++] = 0;  in sdma_v5_0_vm_set_pte_pde()
1085 	ib->ptr[ib->length_dw++] = count - 1; /* number of entries */  in sdma_v5_0_vm_set_pte_pde()
1094 static void sdma_v5_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v5_0_ring_pad_ib()  argument
1100 	pad_count = (8 - (ib->length_dw & 0x7)) % 8;  in sdma_v5_0_ring_pad_ib()
1103 			ib->ptr[ib->length_dw++] =  in sdma_v5_0_ring_pad_ib()
1107 			ib->ptr[ib->length_dw++] =  in sdma_v5_0_ring_pad_ib()
1660 static void sdma_v5_0_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v5_0_emit_copy_buffer()  argument
1665 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v5_0_emit_copy_buffer()
1667 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v5_0_emit_copy_buffer()
1668 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v5_0_emit_copy_buffer()
1669 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v5_0_emit_copy_buffer()
1670 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v5_0_emit_copy_buffer()
1671 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v5_0_emit_copy_buffer()
1672 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v5_0_emit_copy_buffer()
1685 static void sdma_v5_0_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v5_0_emit_fill_buffer()  argument
1690 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v5_0_emit_fill_buffer()
1691 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v5_0_emit_fill_buffer()
1692 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v5_0_emit_fill_buffer()
1693 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v5_0_emit_fill_buffer()
1694 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v5_0_emit_fill_buffer()