252 				   struct amdgpu_ib *ib,  in sdma_v2_4_ring_emit_ib()  argument
263 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v2_4_ring_emit_ib()
264 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v2_4_ring_emit_ib()
265 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v2_4_ring_emit_ib()
602 	struct amdgpu_ib ib;  in sdma_v2_4_ring_test_ib()  local
616 	memset(&ib, 0, sizeof(ib));  in sdma_v2_4_ring_test_ib()
617 	r = amdgpu_ib_get(adev, NULL, 256, &ib);  in sdma_v2_4_ring_test_ib()
621 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v2_4_ring_test_ib()
623 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v2_4_ring_test_ib()
624 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v2_4_ring_test_ib()
625 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1);  in sdma_v2_4_ring_test_ib()
626 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v2_4_ring_test_ib()
627 	ib.ptr[5] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);  in sdma_v2_4_ring_test_ib()
628 	ib.ptr[6] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);  in sdma_v2_4_ring_test_ib()
629 	ib.ptr[7] = SDMA_PKT_HEADER_OP(SDMA_OP_NOP);  in sdma_v2_4_ring_test_ib()
630 	ib.length_dw = 8;  in sdma_v2_4_ring_test_ib()
632 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v2_4_ring_test_ib()
650 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v2_4_ring_test_ib()
667 static void sdma_v2_4_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v2_4_vm_copy_pte()  argument
673 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v2_4_vm_copy_pte()
675 	ib->ptr[ib->length_dw++] = bytes;  in sdma_v2_4_vm_copy_pte()
676 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v2_4_vm_copy_pte()
677 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v2_4_vm_copy_pte()
678 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v2_4_vm_copy_pte()
679 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v2_4_vm_copy_pte()
680 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v2_4_vm_copy_pte()
694 static void sdma_v2_4_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v2_4_vm_write_pte()  argument
700 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v2_4_vm_write_pte()
702 	ib->ptr[ib->length_dw++] = pe;  in sdma_v2_4_vm_write_pte()
703 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v2_4_vm_write_pte()
704 	ib->ptr[ib->length_dw++] = ndw;  in sdma_v2_4_vm_write_pte()
706 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v2_4_vm_write_pte()
707 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v2_4_vm_write_pte()
724 static void sdma_v2_4_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v2_4_vm_set_pte_pde()  argument
729 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE);  in sdma_v2_4_vm_set_pte_pde()
730 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v2_4_vm_set_pte_pde()
731 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v2_4_vm_set_pte_pde()
732 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v2_4_vm_set_pte_pde()
733 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v2_4_vm_set_pte_pde()
734 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v2_4_vm_set_pte_pde()
735 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v2_4_vm_set_pte_pde()
736 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v2_4_vm_set_pte_pde()
737 	ib->ptr[ib->length_dw++] = 0;  in sdma_v2_4_vm_set_pte_pde()
738 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in sdma_v2_4_vm_set_pte_pde()
747 static void sdma_v2_4_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v2_4_ring_pad_ib()  argument
753 	pad_count = (8 - (ib->length_dw & 0x7)) % 8;  in sdma_v2_4_ring_pad_ib()
756 			ib->ptr[ib->length_dw++] =  in sdma_v2_4_ring_pad_ib()
760 			ib->ptr[ib->length_dw++] =  in sdma_v2_4_ring_pad_ib()
1200 static void sdma_v2_4_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v2_4_emit_copy_buffer()  argument
1205 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v2_4_emit_copy_buffer()
1207 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v2_4_emit_copy_buffer()
1208 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v2_4_emit_copy_buffer()
1209 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v2_4_emit_copy_buffer()
1210 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v2_4_emit_copy_buffer()
1211 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v2_4_emit_copy_buffer()
1212 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v2_4_emit_copy_buffer()
1225 static void sdma_v2_4_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v2_4_emit_fill_buffer()  argument
1230 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v2_4_emit_fill_buffer()
1231 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v2_4_emit_fill_buffer()
1232 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v2_4_emit_fill_buffer()
1233 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v2_4_emit_fill_buffer()
1234 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v2_4_emit_fill_buffer()