184 	blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v8_0_mc_stop()
202 	tmp = RREG32(mmMC_SHARED_BLACKOUT_CNTL);  in gmc_v8_0_mc_resume()
328 	running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN);  in gmc_v8_0_tonga_mc_load_microcode()
351 			if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),  in gmc_v8_0_tonga_mc_load_microcode()
357 			if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL),  in gmc_v8_0_tonga_mc_load_microcode()
397 	data = RREG32(mmMC_SEQ_MISC0);  in gmc_v8_0_polaris_mc_load_microcode()
421 		data = RREG32(mmMC_SEQ_MISC0);  in gmc_v8_0_polaris_mc_load_microcode()
436 		base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF;  in gmc_v8_0_vram_gtt_location()
471 		tmp = RREG32(mmVGA_HDP_CONTROL);  in gmc_v8_0_mc_program()
476 		tmp = RREG32(mmVGA_RENDER_CONTROL);  in gmc_v8_0_mc_program()
507 	tmp = RREG32(mmHDP_MISC_CNTL);  in gmc_v8_0_mc_program()
511 	tmp = RREG32(mmHDP_HOST_PATH_CNTL);  in gmc_v8_0_mc_program()
534 		tmp = RREG32(mmMC_ARB_RAMCFG);  in gmc_v8_0_mc_init()
540 		tmp = RREG32(mmMC_SHARED_CHMAP);  in gmc_v8_0_mc_init()
574 	adev->gmc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v8_0_mc_init()
575 	adev->gmc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;  in gmc_v8_0_mc_init()
587 		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;  in gmc_v8_0_mc_init()
723 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_set_fault_enable_default()
756 	tmp = RREG32(mmVM_PRT_CNTL);  in gmc_v8_0_set_prt()
826 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v8_0_gart_enable()
834 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v8_0_gart_enable()
843 	tmp = RREG32(mmVM_L2_CNTL2);  in gmc_v8_0_gart_enable()
849 	tmp = RREG32(mmVM_L2_CNTL3);  in gmc_v8_0_gart_enable()
855 	tmp = RREG32(mmVM_L2_CNTL4);  in gmc_v8_0_gart_enable()
876 	tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_gart_enable()
906 	tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_gart_enable()
964 	tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL);  in gmc_v8_0_gart_disable()
970 	tmp = RREG32(mmVM_L2_CNTL);  in gmc_v8_0_gart_disable()
1060 	u32 d1vga_control = RREG32(mmD1VGA_CONTROL);  in gmc_v8_0_get_vbios_fb_size()
1066 		u32 viewport = RREG32(mmVIEWPORT_SIZE);  in gmc_v8_0_get_vbios_fb_size()
1093 			tmp = RREG32(mmMC_SEQ_MISC0_FIJI);  in gmc_v8_0_sw_init()
1095 			tmp = RREG32(mmMC_SEQ_MISC0);  in gmc_v8_0_sw_init()
1159 		u64 tmp = RREG32(mmMC_VM_FB_OFFSET);  in gmc_v8_0_sw_init()
1260 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v8_0_is_idle()
1277 		tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK |  in gmc_v8_0_wait_for_idle()
1295 	u32 tmp = RREG32(mmSRBM_STATUS);  in gmc_v8_0_check_soft_reset()
1343 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1347 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1353 		tmp = RREG32(mmSRBM_SOFT_RESET);  in gmc_v8_0_soft_reset()
1390 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1394 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1400 		tmp = RREG32(mmVM_CONTEXT0_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1404 		tmp = RREG32(mmVM_CONTEXT1_CNTL);  in gmc_v8_0_vm_fault_interrupt_state()
1428 	addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR);  in gmc_v8_0_process_interrupt()
1429 	status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS);  in gmc_v8_0_process_interrupt()
1430 	mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT);  in gmc_v8_0_process_interrupt()
1489 		data = RREG32(mmMC_HUB_MISC_HUB_CG);  in fiji_update_mc_medium_grain_clock_gating()
1493 		data = RREG32(mmMC_HUB_MISC_SIP_CG);  in fiji_update_mc_medium_grain_clock_gating()
1497 		data = RREG32(mmMC_HUB_MISC_VM_CG);  in fiji_update_mc_medium_grain_clock_gating()
1501 		data = RREG32(mmMC_XPB_CLK_GAT);  in fiji_update_mc_medium_grain_clock_gating()
1505 		data = RREG32(mmATC_MISC_CG);  in fiji_update_mc_medium_grain_clock_gating()
1509 		data = RREG32(mmMC_CITF_MISC_WR_CG);  in fiji_update_mc_medium_grain_clock_gating()
1513 		data = RREG32(mmMC_CITF_MISC_RD_CG);  in fiji_update_mc_medium_grain_clock_gating()
1517 		data = RREG32(mmMC_CITF_MISC_VM_CG);  in fiji_update_mc_medium_grain_clock_gating()
1521 		data = RREG32(mmVM_L2_CG);  in fiji_update_mc_medium_grain_clock_gating()
1525 		data = RREG32(mmMC_HUB_MISC_HUB_CG);  in fiji_update_mc_medium_grain_clock_gating()
1529 		data = RREG32(mmMC_HUB_MISC_SIP_CG);  in fiji_update_mc_medium_grain_clock_gating()
1533 		data = RREG32(mmMC_HUB_MISC_VM_CG);  in fiji_update_mc_medium_grain_clock_gating()
1537 		data = RREG32(mmMC_XPB_CLK_GAT);  in fiji_update_mc_medium_grain_clock_gating()
1541 		data = RREG32(mmATC_MISC_CG);  in fiji_update_mc_medium_grain_clock_gating()
1545 		data = RREG32(mmMC_CITF_MISC_WR_CG);  in fiji_update_mc_medium_grain_clock_gating()
1549 		data = RREG32(mmMC_CITF_MISC_RD_CG);  in fiji_update_mc_medium_grain_clock_gating()
1553 		data = RREG32(mmMC_CITF_MISC_VM_CG);  in fiji_update_mc_medium_grain_clock_gating()
1557 		data = RREG32(mmVM_L2_CG);  in fiji_update_mc_medium_grain_clock_gating()
1569 		data = RREG32(mmMC_HUB_MISC_HUB_CG);  in fiji_update_mc_light_sleep()
1573 		data = RREG32(mmMC_HUB_MISC_SIP_CG);  in fiji_update_mc_light_sleep()
1577 		data = RREG32(mmMC_HUB_MISC_VM_CG);  in fiji_update_mc_light_sleep()
1581 		data = RREG32(mmMC_XPB_CLK_GAT);  in fiji_update_mc_light_sleep()
1585 		data = RREG32(mmATC_MISC_CG);  in fiji_update_mc_light_sleep()
1589 		data = RREG32(mmMC_CITF_MISC_WR_CG);  in fiji_update_mc_light_sleep()
1593 		data = RREG32(mmMC_CITF_MISC_RD_CG);  in fiji_update_mc_light_sleep()
1597 		data = RREG32(mmMC_CITF_MISC_VM_CG);  in fiji_update_mc_light_sleep()
1601 		data = RREG32(mmVM_L2_CG);  in fiji_update_mc_light_sleep()
1605 		data = RREG32(mmMC_HUB_MISC_HUB_CG);  in fiji_update_mc_light_sleep()
1609 		data = RREG32(mmMC_HUB_MISC_SIP_CG);  in fiji_update_mc_light_sleep()
1613 		data = RREG32(mmMC_HUB_MISC_VM_CG);  in fiji_update_mc_light_sleep()
1617 		data = RREG32(mmMC_XPB_CLK_GAT);  in fiji_update_mc_light_sleep()
1621 		data = RREG32(mmATC_MISC_CG);  in fiji_update_mc_light_sleep()
1625 		data = RREG32(mmMC_CITF_MISC_WR_CG);  in fiji_update_mc_light_sleep()
1629 		data = RREG32(mmMC_CITF_MISC_RD_CG);  in fiji_update_mc_light_sleep()
1633 		data = RREG32(mmMC_CITF_MISC_VM_CG);  in fiji_update_mc_light_sleep()
1637 		data = RREG32(mmVM_L2_CG);  in fiji_update_mc_light_sleep()
1679 	data = RREG32(mmMC_HUB_MISC_HUB_CG);  in gmc_v8_0_get_clockgating_state()