Lines Matching refs:RREG32_SMC
846 if (RREG32_SMC(ixGENERAL_PWRMGT) & GENERAL_PWRMGT__GPU_COUNTER_CLK_MASK) in cik_get_xclk()
849 if (RREG32_SMC(ixCG_CLKPIN_CNTL) & CG_CLKPIN_CNTL__XTALIN_DIVIDE_MASK) in cik_get_xclk()
906 rom_cntl = RREG32_SMC(ixROM_CNTL); in cik_read_disabled_bios()
1318 tmp = RREG32_SMC(cntl_reg); in cik_set_uvd_clock()
1325 if (RREG32_SMC(status_reg) & CG_DCLK_STATUS__DCLK_STATUS_MASK) in cik_set_uvd_clock()
1360 if (RREG32_SMC(ixCG_ECLK_STATUS) & CG_ECLK_STATUS__ECLK_STATUS_MASK) in cik_set_vce_clocks()
1367 tmp = RREG32_SMC(ixCG_ECLK_CNTL); in cik_set_vce_clocks()
1374 if (RREG32_SMC(ixCG_ECLK_STATUS) & CG_ECLK_STATUS__ECLK_STATUS_MASK) in cik_set_vce_clocks()
1651 orig = data = RREG32_SMC(ixTHM_CLK_CNTL); in cik_program_aspm()
1659 orig = data = RREG32_SMC(ixMISC_CLK_CTRL); in cik_program_aspm()
1667 orig = data = RREG32_SMC(ixCG_CLKPIN_CNTL); in cik_program_aspm()
1672 orig = data = RREG32_SMC(ixCG_CLKPIN_CNTL_2); in cik_program_aspm()
1677 orig = data = RREG32_SMC(ixMPLL_BYPASSCLK_SEL); in cik_program_aspm()
1805 clock_cntl = RREG32_SMC(ixSMC_SYSCON_CLOCK_CNTL_0); in cik_need_reset_on_init()
1806 pc = RREG32_SMC(ixSMC_PC_C); in cik_need_reset_on_init()