74 	INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler);  in amdgpu_vcn_sw_init()
92 			adev->vcn.indirect_sram = true;  in amdgpu_vcn_sw_init()
98 			adev->vcn.indirect_sram = true;  in amdgpu_vcn_sw_init()
104 			adev->vcn.indirect_sram = true;  in amdgpu_vcn_sw_init()
110 			adev->vcn.indirect_sram = true;  in amdgpu_vcn_sw_init()
116 	r = request_firmware(&adev->vcn.fw, fw_name, adev->dev);  in amdgpu_vcn_sw_init()
123 	r = amdgpu_ucode_validate(adev->vcn.fw);  in amdgpu_vcn_sw_init()
127 		release_firmware(adev->vcn.fw);  in amdgpu_vcn_sw_init()
128 		adev->vcn.fw = NULL;  in amdgpu_vcn_sw_init()
132 	hdr = (const struct common_firmware_header *)adev->vcn.fw->data;  in amdgpu_vcn_sw_init()
133 	adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);  in amdgpu_vcn_sw_init()
166 	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {  in amdgpu_vcn_sw_init()
167 		if (adev->vcn.harvest_config & (1 << i))  in amdgpu_vcn_sw_init()
171 						AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].vcpu_bo,  in amdgpu_vcn_sw_init()
172 						&adev->vcn.inst[i].gpu_addr, &adev->vcn.inst[i].cpu_addr);  in amdgpu_vcn_sw_init()
179 	if (adev->vcn.indirect_sram) {  in amdgpu_vcn_sw_init()
181 			    AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.dpg_sram_bo,  in amdgpu_vcn_sw_init()
182 			    &adev->vcn.dpg_sram_gpu_addr, &adev->vcn.dpg_sram_cpu_addr);  in amdgpu_vcn_sw_init()
196 	if (adev->vcn.indirect_sram) {  in amdgpu_vcn_sw_fini()
197 		amdgpu_bo_free_kernel(&adev->vcn.dpg_sram_bo,  in amdgpu_vcn_sw_fini()
198 				      &adev->vcn.dpg_sram_gpu_addr,  in amdgpu_vcn_sw_fini()
199 				      (void **)&adev->vcn.dpg_sram_cpu_addr);  in amdgpu_vcn_sw_fini()
202 	for (j = 0; j < adev->vcn.num_vcn_inst; ++j) {  in amdgpu_vcn_sw_fini()
203 		if (adev->vcn.harvest_config & (1 << j))  in amdgpu_vcn_sw_fini()
205 		kvfree(adev->vcn.inst[j].saved_bo);  in amdgpu_vcn_sw_fini()
207 		amdgpu_bo_free_kernel(&adev->vcn.inst[j].vcpu_bo,  in amdgpu_vcn_sw_fini()
208 					  &adev->vcn.inst[j].gpu_addr,  in amdgpu_vcn_sw_fini()
209 					  (void **)&adev->vcn.inst[j].cpu_addr);  in amdgpu_vcn_sw_fini()
211 		amdgpu_ring_fini(&adev->vcn.inst[j].ring_dec);  in amdgpu_vcn_sw_fini()
213 		for (i = 0; i < adev->vcn.num_enc_rings; ++i)  in amdgpu_vcn_sw_fini()
214 			amdgpu_ring_fini(&adev->vcn.inst[j].ring_enc[i]);  in amdgpu_vcn_sw_fini()
216 		amdgpu_ring_fini(&adev->vcn.inst[j].ring_jpeg);  in amdgpu_vcn_sw_fini()
219 	release_firmware(adev->vcn.fw);  in amdgpu_vcn_sw_fini()
230 	cancel_delayed_work_sync(&adev->vcn.idle_work);  in amdgpu_vcn_suspend()
232 	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {  in amdgpu_vcn_suspend()
233 		if (adev->vcn.harvest_config & (1 << i))  in amdgpu_vcn_suspend()
235 		if (adev->vcn.inst[i].vcpu_bo == NULL)  in amdgpu_vcn_suspend()
238 		size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo);  in amdgpu_vcn_suspend()
239 		ptr = adev->vcn.inst[i].cpu_addr;  in amdgpu_vcn_suspend()
241 		adev->vcn.inst[i].saved_bo = kvmalloc(size, GFP_KERNEL);  in amdgpu_vcn_suspend()
242 		if (!adev->vcn.inst[i].saved_bo)  in amdgpu_vcn_suspend()
245 		memcpy_fromio(adev->vcn.inst[i].saved_bo, ptr, size);  in amdgpu_vcn_suspend()
256 	for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {  in amdgpu_vcn_resume()
257 		if (adev->vcn.harvest_config & (1 << i))  in amdgpu_vcn_resume()
259 		if (adev->vcn.inst[i].vcpu_bo == NULL)  in amdgpu_vcn_resume()
262 		size = amdgpu_bo_size(adev->vcn.inst[i].vcpu_bo);  in amdgpu_vcn_resume()
263 		ptr = adev->vcn.inst[i].cpu_addr;  in amdgpu_vcn_resume()
265 		if (adev->vcn.inst[i].saved_bo != NULL) {  in amdgpu_vcn_resume()
266 			memcpy_toio(ptr, adev->vcn.inst[i].saved_bo, size);  in amdgpu_vcn_resume()
267 			kvfree(adev->vcn.inst[i].saved_bo);  in amdgpu_vcn_resume()
268 			adev->vcn.inst[i].saved_bo = NULL;  in amdgpu_vcn_resume()
273 			hdr = (const struct common_firmware_header *)adev->vcn.fw->data;  in amdgpu_vcn_resume()
276 				memcpy_toio(adev->vcn.inst[i].cpu_addr, adev->vcn.fw->data + offset,  in amdgpu_vcn_resume()
290 		container_of(work, struct amdgpu_device, vcn.idle_work.work);  in amdgpu_vcn_idle_work_handler()
294 	for (j = 0; j < adev->vcn.num_vcn_inst; ++j) {  in amdgpu_vcn_idle_work_handler()
295 		if (adev->vcn.harvest_config & (1 << j))  in amdgpu_vcn_idle_work_handler()
297 		for (i = 0; i < adev->vcn.num_enc_rings; ++i) {  in amdgpu_vcn_idle_work_handler()
298 			fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_enc[i]);  in amdgpu_vcn_idle_work_handler()
309 			if (amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_jpeg))  in amdgpu_vcn_idle_work_handler()
314 			adev->vcn.pause_dpg_mode(adev, &new_state);  in amdgpu_vcn_idle_work_handler()
317 		fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_jpeg);  in amdgpu_vcn_idle_work_handler()
318 		fence[j] += amdgpu_fence_count_emitted(&adev->vcn.inst[j].ring_dec);  in amdgpu_vcn_idle_work_handler()
330 		schedule_delayed_work(&adev->vcn.idle_work, VCN_IDLE_TIMEOUT);  in amdgpu_vcn_idle_work_handler()
337 	bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);  in amdgpu_vcn_ring_begin_use()
353 		for (i = 0; i < adev->vcn.num_enc_rings; ++i) {  in amdgpu_vcn_ring_begin_use()
354 			fences += amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_enc[i]);  in amdgpu_vcn_ring_begin_use()
361 		if (amdgpu_fence_count_emitted(&adev->vcn.inst[ring->me].ring_jpeg))  in amdgpu_vcn_ring_begin_use()
371 		adev->vcn.pause_dpg_mode(adev, &new_state);  in amdgpu_vcn_ring_begin_use()
377 	schedule_delayed_work(&ring->adev->vcn.idle_work, VCN_IDLE_TIMEOUT);  in amdgpu_vcn_ring_end_use()
387 	WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);  in amdgpu_vcn_dec_ring_test_ring()
391 	amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.scratch9, 0));  in amdgpu_vcn_dec_ring_test_ring()
395 		tmp = RREG32(adev->vcn.inst[ring->me].external.scratch9);  in amdgpu_vcn_dec_ring_test_ring()
424 	ib->ptr[0] = PACKET0(adev->vcn.internal.data0, 0);  in amdgpu_vcn_dec_send_msg()
426 	ib->ptr[2] = PACKET0(adev->vcn.internal.data1, 0);  in amdgpu_vcn_dec_send_msg()
428 	ib->ptr[4] = PACKET0(adev->vcn.internal.cmd, 0);  in amdgpu_vcn_dec_send_msg()
431 		ib->ptr[i] = PACKET0(adev->vcn.internal.nop, 0);  in amdgpu_vcn_dec_send_msg()
717 	WREG32(adev->vcn.inst[ring->me].external.jpeg_pitch, 0xCAFEDEAD);  in amdgpu_vcn_jpeg_ring_test_ring()
722 	amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.jpeg_pitch, 0));  in amdgpu_vcn_jpeg_ring_test_ring()
727 		tmp = RREG32(adev->vcn.inst[ring->me].external.jpeg_pitch);  in amdgpu_vcn_jpeg_ring_test_ring()
755 	ib->ptr[0] = PACKETJ(adev->vcn.internal.jpeg_pitch, 0, 0, PACKETJ_TYPE0);  in amdgpu_vcn_jpeg_set_reg()
801 		tmp = RREG32(adev->vcn.inst[ring->me].external.jpeg_pitch);  in amdgpu_vcn_jpeg_ring_test_ib()