Lines Matching refs:ib_idx

576 static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx,  in amdgpu_vce_validate_bo()  argument
587 addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) | in amdgpu_vce_validate_bo()
588 ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32; in amdgpu_vce_validate_bo()
624 static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx, in amdgpu_vce_cs_reloc() argument
635 addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) | in amdgpu_vce_cs_reloc()
636 ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32; in amdgpu_vce_cs_reloc()
657 amdgpu_set_ib_value(p, ib_idx, lo, lower_32_bits(addr)); in amdgpu_vce_cs_reloc()
658 amdgpu_set_ib_value(p, ib_idx, hi, upper_32_bits(addr)); in amdgpu_vce_cs_reloc()
709 int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx) in amdgpu_vce_ring_parse_cs() argument
711 struct amdgpu_ib *ib = &p->job->ibs[ib_idx]; in amdgpu_vce_ring_parse_cs()
726 uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx); in amdgpu_vce_ring_parse_cs()
727 uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1); in amdgpu_vce_ring_parse_cs()
737 fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6); in amdgpu_vce_ring_parse_cs()
738 bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7); in amdgpu_vce_ring_parse_cs()
742 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 10, in amdgpu_vce_ring_parse_cs()
747 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 12, in amdgpu_vce_ring_parse_cs()
754 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, in amdgpu_vce_ring_parse_cs()
761 tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4); in amdgpu_vce_ring_parse_cs()
762 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
769 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
776 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, in amdgpu_vce_ring_parse_cs()
781 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 8, in amdgpu_vce_ring_parse_cs()
792 uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx); in amdgpu_vce_ring_parse_cs()
793 uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1); in amdgpu_vce_ring_parse_cs()
797 handle = amdgpu_get_ib_value(p, ib_idx, idx + 2); in amdgpu_vce_ring_parse_cs()
808 fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6); in amdgpu_vce_ring_parse_cs()
809 bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7); in amdgpu_vce_ring_parse_cs()
824 *size = amdgpu_get_ib_value(p, ib_idx, idx + 8) * in amdgpu_vce_ring_parse_cs()
825 amdgpu_get_ib_value(p, ib_idx, idx + 10) * in amdgpu_vce_ring_parse_cs()
854 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9, in amdgpu_vce_ring_parse_cs()
859 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 12, idx + 11, in amdgpu_vce_ring_parse_cs()
870 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
877 tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4); in amdgpu_vce_ring_parse_cs()
878 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
885 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
892 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, in amdgpu_vce_ring_parse_cs()
897 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 8, in amdgpu_vce_ring_parse_cs()
945 int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx) in amdgpu_vce_ring_parse_cs_vm() argument
947 struct amdgpu_ib *ib = &p->job->ibs[ib_idx]; in amdgpu_vce_ring_parse_cs_vm()
956 uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx); in amdgpu_vce_ring_parse_cs_vm()
957 uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1); in amdgpu_vce_ring_parse_cs_vm()
967 handle = amdgpu_get_ib_value(p, ib_idx, idx + 2); in amdgpu_vce_ring_parse_cs_vm()