33 	DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));  in amdgpu_ucode_print_common_hdr()
34 	DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));  in amdgpu_ucode_print_common_hdr()
35 	DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));  in amdgpu_ucode_print_common_hdr()
36 	DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));  in amdgpu_ucode_print_common_hdr()
37 	DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));  in amdgpu_ucode_print_common_hdr()
38 	DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));  in amdgpu_ucode_print_common_hdr()
39 	DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));  in amdgpu_ucode_print_common_hdr()
40 	DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));  in amdgpu_ucode_print_common_hdr()
41 	DRM_DEBUG("ucode_array_offset_bytes: %u\n",  in amdgpu_ucode_print_common_hdr()
43 	DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));  in amdgpu_ucode_print_common_hdr()
51 	DRM_DEBUG("MC\n");  in amdgpu_ucode_print_mc_hdr()
58 		DRM_DEBUG("io_debug_size_bytes: %u\n",  in amdgpu_ucode_print_mc_hdr()
60 		DRM_DEBUG("io_debug_array_offset_bytes: %u\n",  in amdgpu_ucode_print_mc_hdr()
72 	DRM_DEBUG("SMC\n");  in amdgpu_ucode_print_smc_hdr()
79 		DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));  in amdgpu_ucode_print_smc_hdr()
86 		DRM_DEBUG("ppt_offset_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_offset_bytes));  in amdgpu_ucode_print_smc_hdr()
87 		DRM_DEBUG("ppt_size_bytes: %u\n", le32_to_cpu(v2_hdr->ppt_size_bytes));  in amdgpu_ucode_print_smc_hdr()
98 	DRM_DEBUG("GFX\n");  in amdgpu_ucode_print_gfx_hdr()
105 		DRM_DEBUG("ucode_feature_version: %u\n",  in amdgpu_ucode_print_gfx_hdr()
107 		DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));  in amdgpu_ucode_print_gfx_hdr()
108 		DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));  in amdgpu_ucode_print_gfx_hdr()
119 	DRM_DEBUG("RLC\n");  in amdgpu_ucode_print_rlc_hdr()
126 		DRM_DEBUG("ucode_feature_version: %u\n",  in amdgpu_ucode_print_rlc_hdr()
128 		DRM_DEBUG("save_and_restore_offset: %u\n",  in amdgpu_ucode_print_rlc_hdr()
130 		DRM_DEBUG("clear_state_descriptor_offset: %u\n",  in amdgpu_ucode_print_rlc_hdr()
132 		DRM_DEBUG("avail_scratch_ram_locations: %u\n",  in amdgpu_ucode_print_rlc_hdr()
134 		DRM_DEBUG("master_pkt_description_offset: %u\n",  in amdgpu_ucode_print_rlc_hdr()
140 		DRM_DEBUG("ucode_feature_version: %u\n",  in amdgpu_ucode_print_rlc_hdr()
142 		DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset));  in amdgpu_ucode_print_rlc_hdr()
143 		DRM_DEBUG("jt_size: %u\n", le32_to_cpu(rlc_hdr->jt_size));  in amdgpu_ucode_print_rlc_hdr()
144 		DRM_DEBUG("save_and_restore_offset: %u\n",  in amdgpu_ucode_print_rlc_hdr()
146 		DRM_DEBUG("clear_state_descriptor_offset: %u\n",  in amdgpu_ucode_print_rlc_hdr()
148 		DRM_DEBUG("avail_scratch_ram_locations: %u\n",  in amdgpu_ucode_print_rlc_hdr()
150 		DRM_DEBUG("reg_restore_list_size: %u\n",  in amdgpu_ucode_print_rlc_hdr()
152 		DRM_DEBUG("reg_list_format_start: %u\n",  in amdgpu_ucode_print_rlc_hdr()
154 		DRM_DEBUG("reg_list_format_separate_start: %u\n",  in amdgpu_ucode_print_rlc_hdr()
156 		DRM_DEBUG("starting_offsets_start: %u\n",  in amdgpu_ucode_print_rlc_hdr()
158 		DRM_DEBUG("reg_list_format_size_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
160 		DRM_DEBUG("reg_list_format_array_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
162 		DRM_DEBUG("reg_list_size_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
164 		DRM_DEBUG("reg_list_array_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
166 		DRM_DEBUG("reg_list_format_separate_size_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
168 		DRM_DEBUG("reg_list_format_separate_array_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
170 		DRM_DEBUG("reg_list_separate_size_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
172 		DRM_DEBUG("reg_list_separate_array_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
177 			DRM_DEBUG("reg_list_format_direct_reg_list_length: %u\n",  in amdgpu_ucode_print_rlc_hdr()
179 			DRM_DEBUG("save_restore_list_cntl_ucode_ver: %u\n",  in amdgpu_ucode_print_rlc_hdr()
181 			DRM_DEBUG("save_restore_list_cntl_feature_ver: %u\n",  in amdgpu_ucode_print_rlc_hdr()
183 			DRM_DEBUG("save_restore_list_cntl_size_bytes %u\n",  in amdgpu_ucode_print_rlc_hdr()
185 			DRM_DEBUG("save_restore_list_cntl_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
187 			DRM_DEBUG("save_restore_list_gpm_ucode_ver: %u\n",  in amdgpu_ucode_print_rlc_hdr()
189 			DRM_DEBUG("save_restore_list_gpm_feature_ver: %u\n",  in amdgpu_ucode_print_rlc_hdr()
191 			DRM_DEBUG("save_restore_list_gpm_size_bytes %u\n",  in amdgpu_ucode_print_rlc_hdr()
193 			DRM_DEBUG("save_restore_list_gpm_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
195 			DRM_DEBUG("save_restore_list_srm_ucode_ver: %u\n",  in amdgpu_ucode_print_rlc_hdr()
197 			DRM_DEBUG("save_restore_list_srm_feature_ver: %u\n",  in amdgpu_ucode_print_rlc_hdr()
199 			DRM_DEBUG("save_restore_list_srm_size_bytes %u\n",  in amdgpu_ucode_print_rlc_hdr()
201 			DRM_DEBUG("save_restore_list_srm_offset_bytes: %u\n",  in amdgpu_ucode_print_rlc_hdr()
214 	DRM_DEBUG("SDMA\n");  in amdgpu_ucode_print_sdma_hdr()
221 		DRM_DEBUG("ucode_feature_version: %u\n",  in amdgpu_ucode_print_sdma_hdr()
223 		DRM_DEBUG("ucode_change_version: %u\n",  in amdgpu_ucode_print_sdma_hdr()
225 		DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));  in amdgpu_ucode_print_sdma_hdr()
226 		DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));  in amdgpu_ucode_print_sdma_hdr()
230 			DRM_DEBUG("digest_size: %u\n", le32_to_cpu(sdma_v1_1_hdr->digest_size));  in amdgpu_ucode_print_sdma_hdr()
243 	DRM_DEBUG("PSP\n");  in amdgpu_ucode_print_psp_hdr()
250 		DRM_DEBUG("ucode_feature_version: %u\n",  in amdgpu_ucode_print_psp_hdr()
252 		DRM_DEBUG("sos_offset_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
254 		DRM_DEBUG("sos_size_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
259 			DRM_DEBUG("toc_header_version: %u\n",  in amdgpu_ucode_print_psp_hdr()
261 			DRM_DEBUG("toc_offset_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
263 			DRM_DEBUG("toc_size_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
265 			DRM_DEBUG("kdb_header_version: %u\n",  in amdgpu_ucode_print_psp_hdr()
267 			DRM_DEBUG("kdb_offset_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
269 			DRM_DEBUG("kdb_size_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
275 			DRM_DEBUG("kdb_header_version: %u\n",  in amdgpu_ucode_print_psp_hdr()
277 			DRM_DEBUG("kdb_offset_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
279 			DRM_DEBUG("kdb_size_bytes: %u\n",  in amdgpu_ucode_print_psp_hdr()
293 	DRM_DEBUG("GPU_INFO\n");  in amdgpu_ucode_print_gpu_info_hdr()
300 		DRM_DEBUG("version_major: %u\n",  in amdgpu_ucode_print_gpu_info_hdr()
302 		DRM_DEBUG("version_minor: %u\n",  in amdgpu_ucode_print_gpu_info_hdr()