Lines Matching refs:adev
43 static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
85 void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev) in amdgpu_pm_acpi_event_handler() argument
87 if (adev->pm.dpm_enabled) { in amdgpu_pm_acpi_event_handler()
88 mutex_lock(&adev->pm.mutex); in amdgpu_pm_acpi_event_handler()
90 adev->pm.ac_power = true; in amdgpu_pm_acpi_event_handler()
92 adev->pm.ac_power = false; in amdgpu_pm_acpi_event_handler()
93 if (adev->powerplay.pp_funcs->enable_bapm) in amdgpu_pm_acpi_event_handler()
94 amdgpu_dpm_enable_bapm(adev, adev->pm.ac_power); in amdgpu_pm_acpi_event_handler()
95 mutex_unlock(&adev->pm.mutex); in amdgpu_pm_acpi_event_handler()
99 int amdgpu_dpm_read_sensor(struct amdgpu_device *adev, enum amd_pp_sensors sensor, in amdgpu_dpm_read_sensor() argument
107 if (is_support_sw_smu(adev)) in amdgpu_dpm_read_sensor()
108 ret = smu_read_sensor(&adev->smu, sensor, data, size); in amdgpu_dpm_read_sensor()
110 if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor) in amdgpu_dpm_read_sensor()
111 ret = adev->powerplay.pp_funcs->read_sensor((adev)->powerplay.pp_handle, in amdgpu_dpm_read_sensor()
159 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_dpm_state() local
162 if (is_support_sw_smu(adev)) { in amdgpu_get_dpm_state()
163 if (adev->smu.ppt_funcs->get_current_power_state) in amdgpu_get_dpm_state()
164 pm = amdgpu_smu_get_current_power_state(adev); in amdgpu_get_dpm_state()
166 pm = adev->pm.dpm.user_state; in amdgpu_get_dpm_state()
167 } else if (adev->powerplay.pp_funcs->get_current_power_state) { in amdgpu_get_dpm_state()
168 pm = amdgpu_dpm_get_current_power_state(adev); in amdgpu_get_dpm_state()
170 pm = adev->pm.dpm.user_state; in amdgpu_get_dpm_state()
184 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_dpm_state() local
198 if (is_support_sw_smu(adev)) { in amdgpu_set_dpm_state()
199 mutex_lock(&adev->pm.mutex); in amdgpu_set_dpm_state()
200 adev->pm.dpm.user_state = state; in amdgpu_set_dpm_state()
201 mutex_unlock(&adev->pm.mutex); in amdgpu_set_dpm_state()
202 } else if (adev->powerplay.pp_funcs->dispatch_tasks) { in amdgpu_set_dpm_state()
203 amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state); in amdgpu_set_dpm_state()
205 mutex_lock(&adev->pm.mutex); in amdgpu_set_dpm_state()
206 adev->pm.dpm.user_state = state; in amdgpu_set_dpm_state()
207 mutex_unlock(&adev->pm.mutex); in amdgpu_set_dpm_state()
210 if (!(adev->flags & AMD_IS_PX) || in amdgpu_set_dpm_state()
212 amdgpu_pm_compute_clocks(adev); in amdgpu_set_dpm_state()
283 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_dpm_forced_performance_level() local
286 if (amdgpu_sriov_vf(adev)) in amdgpu_get_dpm_forced_performance_level()
289 if ((adev->flags & AMD_IS_PX) && in amdgpu_get_dpm_forced_performance_level()
293 if (is_support_sw_smu(adev)) in amdgpu_get_dpm_forced_performance_level()
294 level = smu_get_performance_level(&adev->smu); in amdgpu_get_dpm_forced_performance_level()
295 else if (adev->powerplay.pp_funcs->get_performance_level) in amdgpu_get_dpm_forced_performance_level()
296 level = amdgpu_dpm_get_performance_level(adev); in amdgpu_get_dpm_forced_performance_level()
298 level = adev->pm.dpm.forced_level; in amdgpu_get_dpm_forced_performance_level()
318 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_dpm_forced_performance_level() local
324 if ((adev->flags & AMD_IS_PX) && in amdgpu_set_dpm_forced_performance_level()
352 if (amdgpu_sriov_vf(adev)) { in amdgpu_set_dpm_forced_performance_level()
353 if (amdgim_is_hwperf(adev) && in amdgpu_set_dpm_forced_performance_level()
354 adev->virt.ops->force_dpm_level) { in amdgpu_set_dpm_forced_performance_level()
355 mutex_lock(&adev->pm.mutex); in amdgpu_set_dpm_forced_performance_level()
356 adev->virt.ops->force_dpm_level(adev, level); in amdgpu_set_dpm_forced_performance_level()
357 mutex_unlock(&adev->pm.mutex); in amdgpu_set_dpm_forced_performance_level()
364 if (is_support_sw_smu(adev)) in amdgpu_set_dpm_forced_performance_level()
365 current_level = smu_get_performance_level(&adev->smu); in amdgpu_set_dpm_forced_performance_level()
366 else if (adev->powerplay.pp_funcs->get_performance_level) in amdgpu_set_dpm_forced_performance_level()
367 current_level = amdgpu_dpm_get_performance_level(adev); in amdgpu_set_dpm_forced_performance_level()
382 if (is_support_sw_smu(adev)) { in amdgpu_set_dpm_forced_performance_level()
383 ret = smu_force_performance_level(&adev->smu, level); in amdgpu_set_dpm_forced_performance_level()
386 } else if (adev->powerplay.pp_funcs->force_performance_level) { in amdgpu_set_dpm_forced_performance_level()
387 mutex_lock(&adev->pm.mutex); in amdgpu_set_dpm_forced_performance_level()
388 if (adev->pm.dpm.thermal_active) { in amdgpu_set_dpm_forced_performance_level()
390 mutex_unlock(&adev->pm.mutex); in amdgpu_set_dpm_forced_performance_level()
393 ret = amdgpu_dpm_force_performance_level(adev, level); in amdgpu_set_dpm_forced_performance_level()
397 adev->pm.dpm.forced_level = level; in amdgpu_set_dpm_forced_performance_level()
398 mutex_unlock(&adev->pm.mutex); in amdgpu_set_dpm_forced_performance_level()
410 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_num_states() local
414 if (is_support_sw_smu(adev)) { in amdgpu_get_pp_num_states()
415 ret = smu_get_power_num_states(&adev->smu, &data); in amdgpu_get_pp_num_states()
418 } else if (adev->powerplay.pp_funcs->get_pp_num_states) in amdgpu_get_pp_num_states()
419 amdgpu_dpm_get_pp_num_states(adev, &data); in amdgpu_get_pp_num_states()
437 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_cur_state() local
439 struct smu_context *smu = &adev->smu; in amdgpu_get_pp_cur_state()
443 if (is_support_sw_smu(adev)) { in amdgpu_get_pp_cur_state()
448 } else if (adev->powerplay.pp_funcs->get_current_power_state in amdgpu_get_pp_cur_state()
449 && adev->powerplay.pp_funcs->get_pp_num_states) { in amdgpu_get_pp_cur_state()
450 pm = amdgpu_dpm_get_current_power_state(adev); in amdgpu_get_pp_cur_state()
451 amdgpu_dpm_get_pp_num_states(adev, &data); in amdgpu_get_pp_cur_state()
470 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_force_state() local
472 if (adev->pp_force_state_enabled) in amdgpu_get_pp_force_state()
484 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_force_state() local
490 adev->pp_force_state_enabled = false; in amdgpu_set_pp_force_state()
491 else if (is_support_sw_smu(adev)) in amdgpu_set_pp_force_state()
492 adev->pp_force_state_enabled = false; in amdgpu_set_pp_force_state()
493 else if (adev->powerplay.pp_funcs->dispatch_tasks && in amdgpu_set_pp_force_state()
494 adev->powerplay.pp_funcs->get_pp_num_states) { in amdgpu_set_pp_force_state()
504 amdgpu_dpm_get_pp_num_states(adev, &data); in amdgpu_set_pp_force_state()
509 amdgpu_dpm_dispatch_task(adev, in amdgpu_set_pp_force_state()
511 adev->pp_force_state_enabled = true; in amdgpu_set_pp_force_state()
534 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_table() local
538 if (is_support_sw_smu(adev)) { in amdgpu_get_pp_table()
539 size = smu_sys_get_pp_table(&adev->smu, (void **)&table); in amdgpu_get_pp_table()
543 else if (adev->powerplay.pp_funcs->get_pp_table) in amdgpu_get_pp_table()
544 size = amdgpu_dpm_get_pp_table(adev, &table); in amdgpu_get_pp_table()
562 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_table() local
565 if (is_support_sw_smu(adev)) { in amdgpu_set_pp_table()
566 ret = smu_sys_set_pp_table(&adev->smu, (void *)buf, count); in amdgpu_set_pp_table()
569 } else if (adev->powerplay.pp_funcs->set_pp_table) in amdgpu_set_pp_table()
570 amdgpu_dpm_set_pp_table(adev, buf, count); in amdgpu_set_pp_table()
647 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_od_clk_voltage() local
692 if (is_support_sw_smu(adev)) { in amdgpu_set_pp_od_clk_voltage()
693 ret = smu_od_edit_dpm_table(&adev->smu, type, in amdgpu_set_pp_od_clk_voltage()
699 if (adev->powerplay.pp_funcs->odn_edit_dpm_table) { in amdgpu_set_pp_od_clk_voltage()
700 ret = amdgpu_dpm_odn_edit_dpm_table(adev, type, in amdgpu_set_pp_od_clk_voltage()
707 if (adev->powerplay.pp_funcs->dispatch_tasks) { in amdgpu_set_pp_od_clk_voltage()
708 amdgpu_dpm_dispatch_task(adev, in amdgpu_set_pp_od_clk_voltage()
726 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_od_clk_voltage() local
729 if (is_support_sw_smu(adev)) { in amdgpu_get_pp_od_clk_voltage()
730 size = smu_print_clk_levels(&adev->smu, SMU_OD_SCLK, buf); in amdgpu_get_pp_od_clk_voltage()
731 size += smu_print_clk_levels(&adev->smu, SMU_OD_MCLK, buf+size); in amdgpu_get_pp_od_clk_voltage()
732 size += smu_print_clk_levels(&adev->smu, SMU_OD_VDDC_CURVE, buf+size); in amdgpu_get_pp_od_clk_voltage()
733 size += smu_print_clk_levels(&adev->smu, SMU_OD_RANGE, buf+size); in amdgpu_get_pp_od_clk_voltage()
735 } else if (adev->powerplay.pp_funcs->print_clock_levels) { in amdgpu_get_pp_od_clk_voltage()
736 size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf); in amdgpu_get_pp_od_clk_voltage()
737 size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, buf+size); in amdgpu_get_pp_od_clk_voltage()
738 size += amdgpu_dpm_print_clock_levels(adev, OD_VDDC_CURVE, buf+size); in amdgpu_get_pp_od_clk_voltage()
739 size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, buf+size); in amdgpu_get_pp_od_clk_voltage()
769 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_feature_status() local
779 if (is_support_sw_smu(adev)) { in amdgpu_set_pp_feature_status()
780 ret = smu_sys_set_pp_feature_mask(&adev->smu, featuremask); in amdgpu_set_pp_feature_status()
783 } else if (adev->powerplay.pp_funcs->set_ppfeature_status) { in amdgpu_set_pp_feature_status()
784 ret = amdgpu_dpm_set_ppfeature_status(adev, featuremask); in amdgpu_set_pp_feature_status()
797 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_feature_status() local
799 if (is_support_sw_smu(adev)) { in amdgpu_get_pp_feature_status()
800 return smu_sys_get_pp_feature_mask(&adev->smu, buf); in amdgpu_get_pp_feature_status()
801 } else if (adev->powerplay.pp_funcs->get_ppfeature_status) in amdgpu_get_pp_feature_status()
802 return amdgpu_dpm_get_ppfeature_status(adev, buf); in amdgpu_get_pp_feature_status()
837 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_dpm_sclk() local
839 if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) && in amdgpu_get_pp_dpm_sclk()
840 adev->virt.ops->get_pp_clk) in amdgpu_get_pp_dpm_sclk()
841 return adev->virt.ops->get_pp_clk(adev, PP_SCLK, buf); in amdgpu_get_pp_dpm_sclk()
843 if (is_support_sw_smu(adev)) in amdgpu_get_pp_dpm_sclk()
844 return smu_print_clk_levels(&adev->smu, SMU_SCLK, buf); in amdgpu_get_pp_dpm_sclk()
845 else if (adev->powerplay.pp_funcs->print_clock_levels) in amdgpu_get_pp_dpm_sclk()
846 return amdgpu_dpm_print_clock_levels(adev, PP_SCLK, buf); in amdgpu_get_pp_dpm_sclk()
893 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_dpm_sclk() local
897 if (amdgpu_sriov_vf(adev)) in amdgpu_set_pp_dpm_sclk()
904 if (is_support_sw_smu(adev)) in amdgpu_set_pp_dpm_sclk()
905 ret = smu_force_clk_levels(&adev->smu, SMU_SCLK, mask); in amdgpu_set_pp_dpm_sclk()
906 else if (adev->powerplay.pp_funcs->force_clock_level) in amdgpu_set_pp_dpm_sclk()
907 ret = amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask); in amdgpu_set_pp_dpm_sclk()
920 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_dpm_mclk() local
922 if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) && in amdgpu_get_pp_dpm_mclk()
923 adev->virt.ops->get_pp_clk) in amdgpu_get_pp_dpm_mclk()
924 return adev->virt.ops->get_pp_clk(adev, PP_MCLK, buf); in amdgpu_get_pp_dpm_mclk()
926 if (is_support_sw_smu(adev)) in amdgpu_get_pp_dpm_mclk()
927 return smu_print_clk_levels(&adev->smu, SMU_MCLK, buf); in amdgpu_get_pp_dpm_mclk()
928 else if (adev->powerplay.pp_funcs->print_clock_levels) in amdgpu_get_pp_dpm_mclk()
929 return amdgpu_dpm_print_clock_levels(adev, PP_MCLK, buf); in amdgpu_get_pp_dpm_mclk()
940 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_dpm_mclk() local
944 if (amdgpu_sriov_vf(adev)) in amdgpu_set_pp_dpm_mclk()
951 if (is_support_sw_smu(adev)) in amdgpu_set_pp_dpm_mclk()
952 ret = smu_force_clk_levels(&adev->smu, SMU_MCLK, mask); in amdgpu_set_pp_dpm_mclk()
953 else if (adev->powerplay.pp_funcs->force_clock_level) in amdgpu_set_pp_dpm_mclk()
954 ret = amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask); in amdgpu_set_pp_dpm_mclk()
967 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_dpm_socclk() local
969 if (is_support_sw_smu(adev)) in amdgpu_get_pp_dpm_socclk()
970 return smu_print_clk_levels(&adev->smu, SMU_SOCCLK, buf); in amdgpu_get_pp_dpm_socclk()
971 else if (adev->powerplay.pp_funcs->print_clock_levels) in amdgpu_get_pp_dpm_socclk()
972 return amdgpu_dpm_print_clock_levels(adev, PP_SOCCLK, buf); in amdgpu_get_pp_dpm_socclk()
983 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_dpm_socclk() local
991 if (is_support_sw_smu(adev)) in amdgpu_set_pp_dpm_socclk()
992 ret = smu_force_clk_levels(&adev->smu, SMU_SOCCLK, mask); in amdgpu_set_pp_dpm_socclk()
993 else if (adev->powerplay.pp_funcs->force_clock_level) in amdgpu_set_pp_dpm_socclk()
994 ret = amdgpu_dpm_force_clock_level(adev, PP_SOCCLK, mask); in amdgpu_set_pp_dpm_socclk()
1007 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_dpm_fclk() local
1009 if (is_support_sw_smu(adev)) in amdgpu_get_pp_dpm_fclk()
1010 return smu_print_clk_levels(&adev->smu, SMU_FCLK, buf); in amdgpu_get_pp_dpm_fclk()
1011 else if (adev->powerplay.pp_funcs->print_clock_levels) in amdgpu_get_pp_dpm_fclk()
1012 return amdgpu_dpm_print_clock_levels(adev, PP_FCLK, buf); in amdgpu_get_pp_dpm_fclk()
1023 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_dpm_fclk() local
1031 if (is_support_sw_smu(adev)) in amdgpu_set_pp_dpm_fclk()
1032 ret = smu_force_clk_levels(&adev->smu, SMU_FCLK, mask); in amdgpu_set_pp_dpm_fclk()
1033 else if (adev->powerplay.pp_funcs->force_clock_level) in amdgpu_set_pp_dpm_fclk()
1034 ret = amdgpu_dpm_force_clock_level(adev, PP_FCLK, mask); in amdgpu_set_pp_dpm_fclk()
1047 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_dpm_dcefclk() local
1049 if (is_support_sw_smu(adev)) in amdgpu_get_pp_dpm_dcefclk()
1050 return smu_print_clk_levels(&adev->smu, SMU_DCEFCLK, buf); in amdgpu_get_pp_dpm_dcefclk()
1051 else if (adev->powerplay.pp_funcs->print_clock_levels) in amdgpu_get_pp_dpm_dcefclk()
1052 return amdgpu_dpm_print_clock_levels(adev, PP_DCEFCLK, buf); in amdgpu_get_pp_dpm_dcefclk()
1063 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_dpm_dcefclk() local
1071 if (is_support_sw_smu(adev)) in amdgpu_set_pp_dpm_dcefclk()
1072 ret = smu_force_clk_levels(&adev->smu, SMU_DCEFCLK, mask); in amdgpu_set_pp_dpm_dcefclk()
1073 else if (adev->powerplay.pp_funcs->force_clock_level) in amdgpu_set_pp_dpm_dcefclk()
1074 ret = amdgpu_dpm_force_clock_level(adev, PP_DCEFCLK, mask); in amdgpu_set_pp_dpm_dcefclk()
1087 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_dpm_pcie() local
1089 if (is_support_sw_smu(adev)) in amdgpu_get_pp_dpm_pcie()
1090 return smu_print_clk_levels(&adev->smu, SMU_PCIE, buf); in amdgpu_get_pp_dpm_pcie()
1091 else if (adev->powerplay.pp_funcs->print_clock_levels) in amdgpu_get_pp_dpm_pcie()
1092 return amdgpu_dpm_print_clock_levels(adev, PP_PCIE, buf); in amdgpu_get_pp_dpm_pcie()
1103 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_dpm_pcie() local
1111 if (is_support_sw_smu(adev)) in amdgpu_set_pp_dpm_pcie()
1112 ret = smu_force_clk_levels(&adev->smu, SMU_PCIE, mask); in amdgpu_set_pp_dpm_pcie()
1113 else if (adev->powerplay.pp_funcs->force_clock_level) in amdgpu_set_pp_dpm_pcie()
1114 ret = amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask); in amdgpu_set_pp_dpm_pcie()
1127 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_sclk_od() local
1130 if (is_support_sw_smu(adev)) in amdgpu_get_pp_sclk_od()
1131 value = smu_get_od_percentage(&(adev->smu), SMU_OD_SCLK); in amdgpu_get_pp_sclk_od()
1132 else if (adev->powerplay.pp_funcs->get_sclk_od) in amdgpu_get_pp_sclk_od()
1133 value = amdgpu_dpm_get_sclk_od(adev); in amdgpu_get_pp_sclk_od()
1144 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_sclk_od() local
1155 if (is_support_sw_smu(adev)) { in amdgpu_set_pp_sclk_od()
1156 value = smu_set_od_percentage(&(adev->smu), SMU_OD_SCLK, (uint32_t)value); in amdgpu_set_pp_sclk_od()
1158 if (adev->powerplay.pp_funcs->set_sclk_od) in amdgpu_set_pp_sclk_od()
1159 amdgpu_dpm_set_sclk_od(adev, (uint32_t)value); in amdgpu_set_pp_sclk_od()
1161 if (adev->powerplay.pp_funcs->dispatch_tasks) { in amdgpu_set_pp_sclk_od()
1162 amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); in amdgpu_set_pp_sclk_od()
1164 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; in amdgpu_set_pp_sclk_od()
1165 amdgpu_pm_compute_clocks(adev); in amdgpu_set_pp_sclk_od()
1178 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_mclk_od() local
1181 if (is_support_sw_smu(adev)) in amdgpu_get_pp_mclk_od()
1182 value = smu_get_od_percentage(&(adev->smu), SMU_OD_MCLK); in amdgpu_get_pp_mclk_od()
1183 else if (adev->powerplay.pp_funcs->get_mclk_od) in amdgpu_get_pp_mclk_od()
1184 value = amdgpu_dpm_get_mclk_od(adev); in amdgpu_get_pp_mclk_od()
1195 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_mclk_od() local
1206 if (is_support_sw_smu(adev)) { in amdgpu_set_pp_mclk_od()
1207 value = smu_set_od_percentage(&(adev->smu), SMU_OD_MCLK, (uint32_t)value); in amdgpu_set_pp_mclk_od()
1209 if (adev->powerplay.pp_funcs->set_mclk_od) in amdgpu_set_pp_mclk_od()
1210 amdgpu_dpm_set_mclk_od(adev, (uint32_t)value); in amdgpu_set_pp_mclk_od()
1212 if (adev->powerplay.pp_funcs->dispatch_tasks) { in amdgpu_set_pp_mclk_od()
1213 amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_READJUST_POWER_STATE, NULL); in amdgpu_set_pp_mclk_od()
1215 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; in amdgpu_set_pp_mclk_od()
1216 amdgpu_pm_compute_clocks(adev); in amdgpu_set_pp_mclk_od()
1249 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pp_power_profile_mode() local
1251 if (is_support_sw_smu(adev)) in amdgpu_get_pp_power_profile_mode()
1252 return smu_get_power_profile_mode(&adev->smu, buf); in amdgpu_get_pp_power_profile_mode()
1253 else if (adev->powerplay.pp_funcs->get_power_profile_mode) in amdgpu_get_pp_power_profile_mode()
1254 return amdgpu_dpm_get_power_profile_mode(adev, buf); in amdgpu_get_pp_power_profile_mode()
1267 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_set_pp_power_profile_mode() local
1303 if (is_support_sw_smu(adev)) in amdgpu_set_pp_power_profile_mode()
1304 ret = smu_set_power_profile_mode(&adev->smu, parameter, parameter_size); in amdgpu_set_pp_power_profile_mode()
1305 else if (adev->powerplay.pp_funcs->set_power_profile_mode) in amdgpu_set_pp_power_profile_mode()
1306 ret = amdgpu_dpm_set_power_profile_mode(adev, parameter, parameter_size); in amdgpu_set_pp_power_profile_mode()
1326 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_busy_percent() local
1330 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, in amdgpu_get_busy_percent()
1352 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_memory_busy_percent() local
1356 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, in amdgpu_get_memory_busy_percent()
1382 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_pcie_bw() local
1385 amdgpu_asic_get_pcie_usage(adev, &count0, &count1); in amdgpu_get_pcie_bw()
1387 count0, count1, pcie_get_mps(adev->pdev)); in amdgpu_get_pcie_bw()
1405 struct amdgpu_device *adev = ddev->dev_private; in amdgpu_get_unique_id() local
1407 if (adev->unique_id) in amdgpu_get_unique_id()
1408 return snprintf(buf, PAGE_SIZE, "%016llx\n", adev->unique_id); in amdgpu_get_unique_id()
1469 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_temp() local
1470 struct drm_device *ddev = adev->ddev; in amdgpu_hwmon_show_temp()
1475 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_show_temp()
1485 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_HOTSPOT_TEMP, in amdgpu_hwmon_show_temp()
1492 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_EDGE_TEMP, in amdgpu_hwmon_show_temp()
1499 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_TEMP, in amdgpu_hwmon_show_temp()
1513 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_temp_thresh() local
1518 temp = adev->pm.dpm.thermal.min_temp; in amdgpu_hwmon_show_temp_thresh()
1520 temp = adev->pm.dpm.thermal.max_temp; in amdgpu_hwmon_show_temp_thresh()
1529 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_hotspot_temp_thresh() local
1534 temp = adev->pm.dpm.thermal.min_hotspot_temp; in amdgpu_hwmon_show_hotspot_temp_thresh()
1536 temp = adev->pm.dpm.thermal.max_hotspot_crit_temp; in amdgpu_hwmon_show_hotspot_temp_thresh()
1545 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_mem_temp_thresh() local
1550 temp = adev->pm.dpm.thermal.min_mem_temp; in amdgpu_hwmon_show_mem_temp_thresh()
1552 temp = adev->pm.dpm.thermal.max_mem_crit_temp; in amdgpu_hwmon_show_mem_temp_thresh()
1573 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_temp_emergency() local
1582 temp = adev->pm.dpm.thermal.max_hotspot_emergency_temp; in amdgpu_hwmon_show_temp_emergency()
1585 temp = adev->pm.dpm.thermal.max_edge_emergency_temp; in amdgpu_hwmon_show_temp_emergency()
1588 temp = adev->pm.dpm.thermal.max_mem_emergency_temp; in amdgpu_hwmon_show_temp_emergency()
1599 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_pwm1_enable() local
1601 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_get_pwm1_enable()
1602 pwm_mode = smu_get_fan_control_mode(&adev->smu); in amdgpu_hwmon_get_pwm1_enable()
1604 if (!adev->powerplay.pp_funcs->get_fan_control_mode) in amdgpu_hwmon_get_pwm1_enable()
1607 pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); in amdgpu_hwmon_get_pwm1_enable()
1618 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_set_pwm1_enable() local
1623 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_set_pwm1_enable()
1624 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_set_pwm1_enable()
1631 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_set_pwm1_enable()
1632 smu_set_fan_control_mode(&adev->smu, value); in amdgpu_hwmon_set_pwm1_enable()
1634 if (!adev->powerplay.pp_funcs->set_fan_control_mode) in amdgpu_hwmon_set_pwm1_enable()
1637 amdgpu_dpm_set_fan_control_mode(adev, value); in amdgpu_hwmon_set_pwm1_enable()
1661 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_set_pwm1() local
1667 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_set_pwm1()
1668 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_set_pwm1()
1670 if (is_support_sw_smu(adev)) in amdgpu_hwmon_set_pwm1()
1671 pwm_mode = smu_get_fan_control_mode(&adev->smu); in amdgpu_hwmon_set_pwm1()
1673 pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); in amdgpu_hwmon_set_pwm1()
1685 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_set_pwm1()
1686 err = smu_set_fan_speed_percent(&adev->smu, value); in amdgpu_hwmon_set_pwm1()
1689 } else if (adev->powerplay.pp_funcs->set_fan_speed_percent) { in amdgpu_hwmon_set_pwm1()
1690 err = amdgpu_dpm_set_fan_speed_percent(adev, value); in amdgpu_hwmon_set_pwm1()
1702 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_pwm1() local
1707 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_get_pwm1()
1708 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_get_pwm1()
1711 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_get_pwm1()
1712 err = smu_get_fan_speed_percent(&adev->smu, &speed); in amdgpu_hwmon_get_pwm1()
1715 } else if (adev->powerplay.pp_funcs->get_fan_speed_percent) { in amdgpu_hwmon_get_pwm1()
1716 err = amdgpu_dpm_get_fan_speed_percent(adev, &speed); in amdgpu_hwmon_get_pwm1()
1730 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_fan1_input() local
1735 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_get_fan1_input()
1736 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_get_fan1_input()
1739 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_get_fan1_input()
1740 err = smu_get_fan_speed_rpm(&adev->smu, &speed); in amdgpu_hwmon_get_fan1_input()
1743 } else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) { in amdgpu_hwmon_get_fan1_input()
1744 err = amdgpu_dpm_get_fan_speed_rpm(adev, &speed); in amdgpu_hwmon_get_fan1_input()
1756 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_fan1_min() local
1761 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MIN_FAN_RPM, in amdgpu_hwmon_get_fan1_min()
1773 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_fan1_max() local
1778 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MAX_FAN_RPM, in amdgpu_hwmon_get_fan1_max()
1790 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_fan1_target() local
1795 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_get_fan1_target()
1796 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_get_fan1_target()
1799 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_get_fan1_target()
1800 err = smu_get_fan_speed_rpm(&adev->smu, &rpm); in amdgpu_hwmon_get_fan1_target()
1803 } else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) { in amdgpu_hwmon_get_fan1_target()
1804 err = amdgpu_dpm_get_fan_speed_rpm(adev, &rpm); in amdgpu_hwmon_get_fan1_target()
1816 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_set_fan1_target() local
1821 if (is_support_sw_smu(adev)) in amdgpu_hwmon_set_fan1_target()
1822 pwm_mode = smu_get_fan_control_mode(&adev->smu); in amdgpu_hwmon_set_fan1_target()
1824 pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); in amdgpu_hwmon_set_fan1_target()
1830 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_set_fan1_target()
1831 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_set_fan1_target()
1838 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_set_fan1_target()
1839 err = smu_set_fan_speed_rpm(&adev->smu, value); in amdgpu_hwmon_set_fan1_target()
1842 } else if (adev->powerplay.pp_funcs->set_fan_speed_rpm) { in amdgpu_hwmon_set_fan1_target()
1843 err = amdgpu_dpm_set_fan_speed_rpm(adev, value); in amdgpu_hwmon_set_fan1_target()
1855 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_get_fan1_enable() local
1858 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_get_fan1_enable()
1859 pwm_mode = smu_get_fan_control_mode(&adev->smu); in amdgpu_hwmon_get_fan1_enable()
1861 if (!adev->powerplay.pp_funcs->get_fan_control_mode) in amdgpu_hwmon_get_fan1_enable()
1864 pwm_mode = amdgpu_dpm_get_fan_control_mode(adev); in amdgpu_hwmon_get_fan1_enable()
1874 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_set_fan1_enable() local
1880 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_set_fan1_enable()
1881 (adev->ddev->switch_power_state != DRM_SWITCH_POWER_ON)) in amdgpu_hwmon_set_fan1_enable()
1896 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_set_fan1_enable()
1897 smu_set_fan_control_mode(&adev->smu, pwm_mode); in amdgpu_hwmon_set_fan1_enable()
1899 if (!adev->powerplay.pp_funcs->set_fan_control_mode) in amdgpu_hwmon_set_fan1_enable()
1901 amdgpu_dpm_set_fan_control_mode(adev, pwm_mode); in amdgpu_hwmon_set_fan1_enable()
1911 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_vddgfx() local
1912 struct drm_device *ddev = adev->ddev; in amdgpu_hwmon_show_vddgfx()
1917 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_show_vddgfx()
1922 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, in amdgpu_hwmon_show_vddgfx()
1941 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_vddnb() local
1942 struct drm_device *ddev = adev->ddev; in amdgpu_hwmon_show_vddnb()
1947 if (!(adev->flags & AMD_IS_APU)) in amdgpu_hwmon_show_vddnb()
1951 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_show_vddnb()
1956 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, in amdgpu_hwmon_show_vddnb()
1975 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_power_avg() local
1976 struct drm_device *ddev = adev->ddev; in amdgpu_hwmon_show_power_avg()
1982 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_show_power_avg()
1987 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_POWER, in amdgpu_hwmon_show_power_avg()
2009 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_power_cap_max() local
2012 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_show_power_cap_max()
2013 smu_get_power_limit(&adev->smu, &limit, true); in amdgpu_hwmon_show_power_cap_max()
2015 } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) { in amdgpu_hwmon_show_power_cap_max()
2016 adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, true); in amdgpu_hwmon_show_power_cap_max()
2027 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_power_cap() local
2030 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_show_power_cap()
2031 smu_get_power_limit(&adev->smu, &limit, false); in amdgpu_hwmon_show_power_cap()
2033 } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) { in amdgpu_hwmon_show_power_cap()
2034 adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, false); in amdgpu_hwmon_show_power_cap()
2047 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_set_power_cap() local
2057 if (is_support_sw_smu(adev)) { in amdgpu_hwmon_set_power_cap()
2058 err = smu_set_power_limit(&adev->smu, value); in amdgpu_hwmon_set_power_cap()
2059 } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_power_limit) { in amdgpu_hwmon_set_power_cap()
2060 err = adev->powerplay.pp_funcs->set_power_limit(adev->powerplay.pp_handle, value); in amdgpu_hwmon_set_power_cap()
2075 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_sclk() local
2076 struct drm_device *ddev = adev->ddev; in amdgpu_hwmon_show_sclk()
2081 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_show_sclk()
2086 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, in amdgpu_hwmon_show_sclk()
2105 struct amdgpu_device *adev = dev_get_drvdata(dev); in amdgpu_hwmon_show_mclk() local
2106 struct drm_device *ddev = adev->ddev; in amdgpu_hwmon_show_mclk()
2111 if ((adev->flags & AMD_IS_PX) && in amdgpu_hwmon_show_mclk()
2116 r = amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, in amdgpu_hwmon_show_mclk()
2294 struct amdgpu_device *adev = dev_get_drvdata(dev); in hwmon_attributes_visible() local
2298 if (adev->pm.no_fan && (attr == &sensor_dev_attr_pwm1.dev_attr.attr || in hwmon_attributes_visible()
2310 if ((adev->flags & AMD_IS_APU) && in hwmon_attributes_visible()
2323 if (!adev->pm.dpm_enabled && in hwmon_attributes_visible()
2337 if (!is_support_sw_smu(adev)) { in hwmon_attributes_visible()
2339 if ((!adev->powerplay.pp_funcs->get_fan_speed_percent && in hwmon_attributes_visible()
2341 (!adev->powerplay.pp_funcs->get_fan_control_mode && in hwmon_attributes_visible()
2345 if ((!adev->powerplay.pp_funcs->set_fan_speed_percent && in hwmon_attributes_visible()
2347 (!adev->powerplay.pp_funcs->set_fan_control_mode && in hwmon_attributes_visible()
2352 if (((adev->flags & AMD_IS_APU) || in hwmon_attributes_visible()
2353 adev->family == AMDGPU_FAMILY_SI || /* not implemented yet */ in hwmon_attributes_visible()
2354 adev->family == AMDGPU_FAMILY_KV) && /* not implemented yet */ in hwmon_attributes_visible()
2361 if (!is_support_sw_smu(adev)) { in hwmon_attributes_visible()
2363 if ((!adev->powerplay.pp_funcs->set_fan_speed_percent && in hwmon_attributes_visible()
2364 !adev->powerplay.pp_funcs->get_fan_speed_percent) && in hwmon_attributes_visible()
2365 (!adev->powerplay.pp_funcs->set_fan_speed_rpm && in hwmon_attributes_visible()
2366 !adev->powerplay.pp_funcs->get_fan_speed_rpm) && in hwmon_attributes_visible()
2371 if ((!adev->powerplay.pp_funcs->set_fan_speed_rpm && in hwmon_attributes_visible()
2372 !adev->powerplay.pp_funcs->get_fan_speed_rpm) && in hwmon_attributes_visible()
2378 if ((adev->family == AMDGPU_FAMILY_SI || /* not implemented yet */ in hwmon_attributes_visible()
2379 adev->family == AMDGPU_FAMILY_KV) && /* not implemented yet */ in hwmon_attributes_visible()
2385 if (!(adev->flags & AMD_IS_APU) && in hwmon_attributes_visible()
2391 if ((adev->flags & AMD_IS_APU) && in hwmon_attributes_visible()
2397 if (((adev->flags & AMD_IS_APU) || in hwmon_attributes_visible()
2398 adev->asic_type < CHIP_VEGA10) && in hwmon_attributes_visible()
2427 struct amdgpu_device *adev = in amdgpu_dpm_thermal_work_handler() local
2434 if (!adev->pm.dpm_enabled) in amdgpu_dpm_thermal_work_handler()
2437 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, in amdgpu_dpm_thermal_work_handler()
2439 if (temp < adev->pm.dpm.thermal.min_temp) in amdgpu_dpm_thermal_work_handler()
2441 dpm_state = adev->pm.dpm.user_state; in amdgpu_dpm_thermal_work_handler()
2443 if (adev->pm.dpm.thermal.high_to_low) in amdgpu_dpm_thermal_work_handler()
2445 dpm_state = adev->pm.dpm.user_state; in amdgpu_dpm_thermal_work_handler()
2447 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_thermal_work_handler()
2449 adev->pm.dpm.thermal_active = true; in amdgpu_dpm_thermal_work_handler()
2451 adev->pm.dpm.thermal_active = false; in amdgpu_dpm_thermal_work_handler()
2452 adev->pm.dpm.state = dpm_state; in amdgpu_dpm_thermal_work_handler()
2453 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_thermal_work_handler()
2455 amdgpu_pm_compute_clocks(adev); in amdgpu_dpm_thermal_work_handler()
2458 static struct amdgpu_ps *amdgpu_dpm_pick_power_state(struct amdgpu_device *adev, in amdgpu_dpm_pick_power_state() argument
2464 bool single_display = (adev->pm.dpm.new_active_crtc_count < 2) ? in amdgpu_dpm_pick_power_state()
2468 if (single_display && adev->powerplay.pp_funcs->vblank_too_short) { in amdgpu_dpm_pick_power_state()
2469 if (amdgpu_dpm_vblank_too_short(adev)) in amdgpu_dpm_pick_power_state()
2484 for (i = 0; i < adev->pm.dpm.num_ps; i++) { in amdgpu_dpm_pick_power_state()
2485 ps = &adev->pm.dpm.ps[i]; in amdgpu_dpm_pick_power_state()
2518 if (adev->pm.dpm.uvd_ps) in amdgpu_dpm_pick_power_state()
2519 return adev->pm.dpm.uvd_ps; in amdgpu_dpm_pick_power_state()
2539 return adev->pm.dpm.boot_ps; in amdgpu_dpm_pick_power_state()
2568 if (adev->pm.dpm.uvd_ps) { in amdgpu_dpm_pick_power_state()
2569 return adev->pm.dpm.uvd_ps; in amdgpu_dpm_pick_power_state()
2592 static void amdgpu_dpm_change_power_state_locked(struct amdgpu_device *adev) in amdgpu_dpm_change_power_state_locked() argument
2600 if (!adev->pm.dpm_enabled) in amdgpu_dpm_change_power_state_locked()
2603 if (adev->pm.dpm.user_state != adev->pm.dpm.state) { in amdgpu_dpm_change_power_state_locked()
2605 if ((!adev->pm.dpm.thermal_active) && in amdgpu_dpm_change_power_state_locked()
2606 (!adev->pm.dpm.uvd_active)) in amdgpu_dpm_change_power_state_locked()
2607 adev->pm.dpm.state = adev->pm.dpm.user_state; in amdgpu_dpm_change_power_state_locked()
2609 dpm_state = adev->pm.dpm.state; in amdgpu_dpm_change_power_state_locked()
2611 ps = amdgpu_dpm_pick_power_state(adev, dpm_state); in amdgpu_dpm_change_power_state_locked()
2613 adev->pm.dpm.requested_ps = ps; in amdgpu_dpm_change_power_state_locked()
2617 if (amdgpu_dpm == 1 && adev->powerplay.pp_funcs->print_power_state) { in amdgpu_dpm_change_power_state_locked()
2619 amdgpu_dpm_print_power_state(adev, adev->pm.dpm.current_ps); in amdgpu_dpm_change_power_state_locked()
2621 amdgpu_dpm_print_power_state(adev, adev->pm.dpm.requested_ps); in amdgpu_dpm_change_power_state_locked()
2625 ps->vce_active = adev->pm.dpm.vce_active; in amdgpu_dpm_change_power_state_locked()
2626 if (adev->powerplay.pp_funcs->display_configuration_changed) in amdgpu_dpm_change_power_state_locked()
2627 amdgpu_dpm_display_configuration_changed(adev); in amdgpu_dpm_change_power_state_locked()
2629 ret = amdgpu_dpm_pre_set_power_state(adev); in amdgpu_dpm_change_power_state_locked()
2633 if (adev->powerplay.pp_funcs->check_state_equal) { in amdgpu_dpm_change_power_state_locked()
2634 …if (0 != amdgpu_dpm_check_state_equal(adev, adev->pm.dpm.current_ps, adev->pm.dpm.requested_ps, &e… in amdgpu_dpm_change_power_state_locked()
2641 amdgpu_dpm_set_power_state(adev); in amdgpu_dpm_change_power_state_locked()
2642 amdgpu_dpm_post_set_power_state(adev); in amdgpu_dpm_change_power_state_locked()
2644 adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs; in amdgpu_dpm_change_power_state_locked()
2645 adev->pm.dpm.current_active_crtc_count = adev->pm.dpm.new_active_crtc_count; in amdgpu_dpm_change_power_state_locked()
2647 if (adev->powerplay.pp_funcs->force_performance_level) { in amdgpu_dpm_change_power_state_locked()
2648 if (adev->pm.dpm.thermal_active) { in amdgpu_dpm_change_power_state_locked()
2649 enum amd_dpm_forced_level level = adev->pm.dpm.forced_level; in amdgpu_dpm_change_power_state_locked()
2651 amdgpu_dpm_force_performance_level(adev, AMD_DPM_FORCED_LEVEL_LOW); in amdgpu_dpm_change_power_state_locked()
2653 adev->pm.dpm.forced_level = level; in amdgpu_dpm_change_power_state_locked()
2656 amdgpu_dpm_force_performance_level(adev, adev->pm.dpm.forced_level); in amdgpu_dpm_change_power_state_locked()
2661 void amdgpu_dpm_enable_uvd(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_enable_uvd() argument
2664 if (is_support_sw_smu(adev)) { in amdgpu_dpm_enable_uvd()
2665 ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_UVD, enable); in amdgpu_dpm_enable_uvd()
2669 } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) { in amdgpu_dpm_enable_uvd()
2671 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_enable_uvd()
2672 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable); in amdgpu_dpm_enable_uvd()
2673 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_enable_uvd()
2676 if (adev->asic_type == CHIP_STONEY && in amdgpu_dpm_enable_uvd()
2677 adev->uvd.decode_image_width >= WIDTH_4K) { in amdgpu_dpm_enable_uvd()
2678 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in amdgpu_dpm_enable_uvd()
2688 void amdgpu_dpm_enable_vce(struct amdgpu_device *adev, bool enable) in amdgpu_dpm_enable_vce() argument
2691 if (is_support_sw_smu(adev)) { in amdgpu_dpm_enable_vce()
2692 ret = smu_dpm_set_power_gate(&adev->smu, AMD_IP_BLOCK_TYPE_VCE, enable); in amdgpu_dpm_enable_vce()
2696 } else if (adev->powerplay.pp_funcs->set_powergating_by_smu) { in amdgpu_dpm_enable_vce()
2698 mutex_lock(&adev->pm.mutex); in amdgpu_dpm_enable_vce()
2699 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_VCE, !enable); in amdgpu_dpm_enable_vce()
2700 mutex_unlock(&adev->pm.mutex); in amdgpu_dpm_enable_vce()
2704 void amdgpu_pm_print_power_states(struct amdgpu_device *adev) in amdgpu_pm_print_power_states() argument
2708 if (adev->powerplay.pp_funcs->print_power_state == NULL) in amdgpu_pm_print_power_states()
2711 for (i = 0; i < adev->pm.dpm.num_ps; i++) in amdgpu_pm_print_power_states()
2712 amdgpu_dpm_print_power_state(adev, &adev->pm.dpm.ps[i]); in amdgpu_pm_print_power_states()
2716 int amdgpu_pm_virt_sysfs_init(struct amdgpu_device *adev) in amdgpu_pm_virt_sysfs_init() argument
2720 if (!(amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev))) in amdgpu_pm_virt_sysfs_init()
2723 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk); in amdgpu_pm_virt_sysfs_init()
2729 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_mclk); in amdgpu_pm_virt_sysfs_init()
2735 ret = device_create_file(adev->dev, &dev_attr_power_dpm_force_performance_level); in amdgpu_pm_virt_sysfs_init()
2744 void amdgpu_pm_virt_sysfs_fini(struct amdgpu_device *adev) in amdgpu_pm_virt_sysfs_fini() argument
2746 if (!(amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev))) in amdgpu_pm_virt_sysfs_fini()
2749 device_remove_file(adev->dev, &dev_attr_power_dpm_force_performance_level); in amdgpu_pm_virt_sysfs_fini()
2750 device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk); in amdgpu_pm_virt_sysfs_fini()
2751 device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk); in amdgpu_pm_virt_sysfs_fini()
2754 int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_version) in amdgpu_pm_load_smu_firmware() argument
2758 if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->load_firmware) { in amdgpu_pm_load_smu_firmware()
2759 r = adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle); in amdgpu_pm_load_smu_firmware()
2764 *smu_version = adev->pm.fw_version; in amdgpu_pm_load_smu_firmware()
2769 int amdgpu_pm_sysfs_init(struct amdgpu_device *adev) in amdgpu_pm_sysfs_init() argument
2771 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in amdgpu_pm_sysfs_init()
2774 if (adev->pm.sysfs_initialized) in amdgpu_pm_sysfs_init()
2777 if (adev->pm.dpm_enabled == 0) in amdgpu_pm_sysfs_init()
2780 adev->pm.int_hwmon_dev = hwmon_device_register_with_groups(adev->dev, in amdgpu_pm_sysfs_init()
2781 DRIVER_NAME, adev, in amdgpu_pm_sysfs_init()
2783 if (IS_ERR(adev->pm.int_hwmon_dev)) { in amdgpu_pm_sysfs_init()
2784 ret = PTR_ERR(adev->pm.int_hwmon_dev); in amdgpu_pm_sysfs_init()
2785 dev_err(adev->dev, in amdgpu_pm_sysfs_init()
2790 ret = device_create_file(adev->dev, &dev_attr_power_dpm_state); in amdgpu_pm_sysfs_init()
2795 ret = device_create_file(adev->dev, &dev_attr_power_dpm_force_performance_level); in amdgpu_pm_sysfs_init()
2802 ret = device_create_file(adev->dev, &dev_attr_pp_num_states); in amdgpu_pm_sysfs_init()
2807 ret = device_create_file(adev->dev, &dev_attr_pp_cur_state); in amdgpu_pm_sysfs_init()
2812 ret = device_create_file(adev->dev, &dev_attr_pp_force_state); in amdgpu_pm_sysfs_init()
2817 ret = device_create_file(adev->dev, &dev_attr_pp_table); in amdgpu_pm_sysfs_init()
2823 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk); in amdgpu_pm_sysfs_init()
2828 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_mclk); in amdgpu_pm_sysfs_init()
2833 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_pm_sysfs_init()
2834 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_socclk); in amdgpu_pm_sysfs_init()
2839 if (adev->asic_type != CHIP_ARCTURUS) { in amdgpu_pm_sysfs_init()
2840 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_dcefclk); in amdgpu_pm_sysfs_init()
2847 if (adev->asic_type >= CHIP_VEGA20) { in amdgpu_pm_sysfs_init()
2848 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_fclk); in amdgpu_pm_sysfs_init()
2854 if (adev->asic_type != CHIP_ARCTURUS) { in amdgpu_pm_sysfs_init()
2855 ret = device_create_file(adev->dev, &dev_attr_pp_dpm_pcie); in amdgpu_pm_sysfs_init()
2861 ret = device_create_file(adev->dev, &dev_attr_pp_sclk_od); in amdgpu_pm_sysfs_init()
2866 ret = device_create_file(adev->dev, &dev_attr_pp_mclk_od); in amdgpu_pm_sysfs_init()
2871 ret = device_create_file(adev->dev, in amdgpu_pm_sysfs_init()
2878 if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || in amdgpu_pm_sysfs_init()
2879 (!is_support_sw_smu(adev) && hwmgr->od_enabled)) { in amdgpu_pm_sysfs_init()
2880 ret = device_create_file(adev->dev, in amdgpu_pm_sysfs_init()
2888 ret = device_create_file(adev->dev, in amdgpu_pm_sysfs_init()
2896 if (!(adev->flags & AMD_IS_APU) && in amdgpu_pm_sysfs_init()
2897 (adev->asic_type != CHIP_VEGA10)) { in amdgpu_pm_sysfs_init()
2898 ret = device_create_file(adev->dev, in amdgpu_pm_sysfs_init()
2907 if (!(adev->flags & AMD_IS_APU)) { in amdgpu_pm_sysfs_init()
2908 ret = device_create_file(adev->dev, &dev_attr_pcie_bw); in amdgpu_pm_sysfs_init()
2914 if (adev->unique_id) in amdgpu_pm_sysfs_init()
2915 ret = device_create_file(adev->dev, &dev_attr_unique_id); in amdgpu_pm_sysfs_init()
2920 ret = amdgpu_debugfs_pm_init(adev); in amdgpu_pm_sysfs_init()
2926 if ((adev->asic_type >= CHIP_VEGA10) && in amdgpu_pm_sysfs_init()
2927 !(adev->flags & AMD_IS_APU)) { in amdgpu_pm_sysfs_init()
2928 ret = device_create_file(adev->dev, in amdgpu_pm_sysfs_init()
2937 adev->pm.sysfs_initialized = true; in amdgpu_pm_sysfs_init()
2942 void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev) in amdgpu_pm_sysfs_fini() argument
2944 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in amdgpu_pm_sysfs_fini()
2946 if (adev->pm.dpm_enabled == 0) in amdgpu_pm_sysfs_fini()
2949 if (adev->pm.int_hwmon_dev) in amdgpu_pm_sysfs_fini()
2950 hwmon_device_unregister(adev->pm.int_hwmon_dev); in amdgpu_pm_sysfs_fini()
2951 device_remove_file(adev->dev, &dev_attr_power_dpm_state); in amdgpu_pm_sysfs_fini()
2952 device_remove_file(adev->dev, &dev_attr_power_dpm_force_performance_level); in amdgpu_pm_sysfs_fini()
2954 device_remove_file(adev->dev, &dev_attr_pp_num_states); in amdgpu_pm_sysfs_fini()
2955 device_remove_file(adev->dev, &dev_attr_pp_cur_state); in amdgpu_pm_sysfs_fini()
2956 device_remove_file(adev->dev, &dev_attr_pp_force_state); in amdgpu_pm_sysfs_fini()
2957 device_remove_file(adev->dev, &dev_attr_pp_table); in amdgpu_pm_sysfs_fini()
2959 device_remove_file(adev->dev, &dev_attr_pp_dpm_sclk); in amdgpu_pm_sysfs_fini()
2960 device_remove_file(adev->dev, &dev_attr_pp_dpm_mclk); in amdgpu_pm_sysfs_fini()
2961 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_pm_sysfs_fini()
2962 device_remove_file(adev->dev, &dev_attr_pp_dpm_socclk); in amdgpu_pm_sysfs_fini()
2963 if (adev->asic_type != CHIP_ARCTURUS) in amdgpu_pm_sysfs_fini()
2964 device_remove_file(adev->dev, &dev_attr_pp_dpm_dcefclk); in amdgpu_pm_sysfs_fini()
2966 if (adev->asic_type != CHIP_ARCTURUS) in amdgpu_pm_sysfs_fini()
2967 device_remove_file(adev->dev, &dev_attr_pp_dpm_pcie); in amdgpu_pm_sysfs_fini()
2968 if (adev->asic_type >= CHIP_VEGA20) in amdgpu_pm_sysfs_fini()
2969 device_remove_file(adev->dev, &dev_attr_pp_dpm_fclk); in amdgpu_pm_sysfs_fini()
2970 device_remove_file(adev->dev, &dev_attr_pp_sclk_od); in amdgpu_pm_sysfs_fini()
2971 device_remove_file(adev->dev, &dev_attr_pp_mclk_od); in amdgpu_pm_sysfs_fini()
2972 device_remove_file(adev->dev, in amdgpu_pm_sysfs_fini()
2974 if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || in amdgpu_pm_sysfs_fini()
2975 (!is_support_sw_smu(adev) && hwmgr->od_enabled)) in amdgpu_pm_sysfs_fini()
2976 device_remove_file(adev->dev, in amdgpu_pm_sysfs_fini()
2978 device_remove_file(adev->dev, &dev_attr_gpu_busy_percent); in amdgpu_pm_sysfs_fini()
2979 if (!(adev->flags & AMD_IS_APU) && in amdgpu_pm_sysfs_fini()
2980 (adev->asic_type != CHIP_VEGA10)) in amdgpu_pm_sysfs_fini()
2981 device_remove_file(adev->dev, &dev_attr_mem_busy_percent); in amdgpu_pm_sysfs_fini()
2982 if (!(adev->flags & AMD_IS_APU)) in amdgpu_pm_sysfs_fini()
2983 device_remove_file(adev->dev, &dev_attr_pcie_bw); in amdgpu_pm_sysfs_fini()
2984 if (adev->unique_id) in amdgpu_pm_sysfs_fini()
2985 device_remove_file(adev->dev, &dev_attr_unique_id); in amdgpu_pm_sysfs_fini()
2986 if ((adev->asic_type >= CHIP_VEGA10) && in amdgpu_pm_sysfs_fini()
2987 !(adev->flags & AMD_IS_APU)) in amdgpu_pm_sysfs_fini()
2988 device_remove_file(adev->dev, &dev_attr_pp_features); in amdgpu_pm_sysfs_fini()
2991 void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) in amdgpu_pm_compute_clocks() argument
2995 if (!adev->pm.dpm_enabled) in amdgpu_pm_compute_clocks()
2998 if (adev->mode_info.num_crtc) in amdgpu_pm_compute_clocks()
2999 amdgpu_display_bandwidth_update(adev); in amdgpu_pm_compute_clocks()
3002 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_pm_compute_clocks()
3007 if (is_support_sw_smu(adev)) { in amdgpu_pm_compute_clocks()
3008 struct smu_dpm_context *smu_dpm = &adev->smu.smu_dpm; in amdgpu_pm_compute_clocks()
3009 smu_handle_task(&adev->smu, in amdgpu_pm_compute_clocks()
3013 if (adev->powerplay.pp_funcs->dispatch_tasks) { in amdgpu_pm_compute_clocks()
3014 if (!amdgpu_device_has_dc_support(adev)) { in amdgpu_pm_compute_clocks()
3015 mutex_lock(&adev->pm.mutex); in amdgpu_pm_compute_clocks()
3016 amdgpu_dpm_get_active_displays(adev); in amdgpu_pm_compute_clocks()
3017 adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count; in amdgpu_pm_compute_clocks()
3018 adev->pm.pm_display_cfg.vrefresh = amdgpu_dpm_get_vrefresh(adev); in amdgpu_pm_compute_clocks()
3019 adev->pm.pm_display_cfg.min_vblank_time = amdgpu_dpm_get_vblank_time(adev); in amdgpu_pm_compute_clocks()
3021 if (adev->pm.pm_display_cfg.vrefresh > 120) in amdgpu_pm_compute_clocks()
3022 adev->pm.pm_display_cfg.min_vblank_time = 0; in amdgpu_pm_compute_clocks()
3023 if (adev->powerplay.pp_funcs->display_configuration_change) in amdgpu_pm_compute_clocks()
3024 adev->powerplay.pp_funcs->display_configuration_change( in amdgpu_pm_compute_clocks()
3025 adev->powerplay.pp_handle, in amdgpu_pm_compute_clocks()
3026 &adev->pm.pm_display_cfg); in amdgpu_pm_compute_clocks()
3027 mutex_unlock(&adev->pm.mutex); in amdgpu_pm_compute_clocks()
3029 amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_DISPLAY_CONFIG_CHANGE, NULL); in amdgpu_pm_compute_clocks()
3031 mutex_lock(&adev->pm.mutex); in amdgpu_pm_compute_clocks()
3032 amdgpu_dpm_get_active_displays(adev); in amdgpu_pm_compute_clocks()
3033 amdgpu_dpm_change_power_state_locked(adev); in amdgpu_pm_compute_clocks()
3034 mutex_unlock(&adev->pm.mutex); in amdgpu_pm_compute_clocks()
3044 static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *adev) in amdgpu_debugfs_pm_info_pp() argument
3054 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3056 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3058 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_SCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3060 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_STABLE_PSTATE_MCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3062 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3064 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3067 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_POWER, (void *)&query, &size)) in amdgpu_debugfs_pm_info_pp()
3073 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_TEMP, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3077 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GPU_LOAD, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3080 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3086 …if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK, (void *)&value64, &s… in amdgpu_debugfs_pm_info_pp()
3089 if (adev->asic_type > CHIP_VEGA20) { in amdgpu_debugfs_pm_info_pp()
3091 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_POWER_STATE, (void *)&value, &size)) { in amdgpu_debugfs_pm_info_pp()
3096 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3098 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3105 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) { in amdgpu_debugfs_pm_info_pp()
3110 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3112 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3119 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) { in amdgpu_debugfs_pm_info_pp()
3124 if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size)) in amdgpu_debugfs_pm_info_pp()
3146 struct amdgpu_device *adev = dev->dev_private; in amdgpu_debugfs_pm_info() local
3147 struct drm_device *ddev = adev->ddev; in amdgpu_debugfs_pm_info()
3150 amdgpu_device_ip_get_clockgating_state(adev, &flags); in amdgpu_debugfs_pm_info()
3155 if (!adev->pm.dpm_enabled) { in amdgpu_debugfs_pm_info()
3159 if ((adev->flags & AMD_IS_PX) && in amdgpu_debugfs_pm_info()
3162 …} else if (!is_support_sw_smu(adev) && adev->powerplay.pp_funcs->debugfs_print_current_performance… in amdgpu_debugfs_pm_info()
3163 mutex_lock(&adev->pm.mutex); in amdgpu_debugfs_pm_info()
3164 if (adev->powerplay.pp_funcs->debugfs_print_current_performance_level) in amdgpu_debugfs_pm_info()
3165 adev->powerplay.pp_funcs->debugfs_print_current_performance_level(adev, m); in amdgpu_debugfs_pm_info()
3168 mutex_unlock(&adev->pm.mutex); in amdgpu_debugfs_pm_info()
3170 return amdgpu_debugfs_pm_info_pp(m, adev); in amdgpu_debugfs_pm_info()
3181 static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev) in amdgpu_debugfs_pm_init() argument
3184 return amdgpu_debugfs_add_files(adev, amdgpu_pm_info_list, ARRAY_SIZE(amdgpu_pm_info_list)); in amdgpu_debugfs_pm_init()