Lines Matching refs:adev
85 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_hotplug_work_func() local
87 struct drm_device *dev = adev->ddev; in amdgpu_hotplug_work_func()
106 void amdgpu_irq_disable_all(struct amdgpu_device *adev) in amdgpu_irq_disable_all() argument
112 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
114 if (!adev->irq.client[i].sources) in amdgpu_irq_disable_all()
118 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_disable_all()
125 r = src->funcs->set(adev, src, k, in amdgpu_irq_disable_all()
133 spin_unlock_irqrestore(&adev->irq.lock, irqflags); in amdgpu_irq_disable_all()
150 struct amdgpu_device *adev = dev->dev_private; in amdgpu_irq_handler() local
153 ret = amdgpu_ih_process(adev, &adev->irq.ih); in amdgpu_irq_handler()
168 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih1() local
171 amdgpu_ih_process(adev, &adev->irq.ih1); in amdgpu_irq_handle_ih1()
183 struct amdgpu_device *adev = container_of(work, struct amdgpu_device, in amdgpu_irq_handle_ih2() local
186 amdgpu_ih_process(adev, &adev->irq.ih2); in amdgpu_irq_handle_ih2()
200 static bool amdgpu_msi_ok(struct amdgpu_device *adev) in amdgpu_msi_ok() argument
221 int amdgpu_irq_init(struct amdgpu_device *adev) in amdgpu_irq_init() argument
225 spin_lock_init(&adev->irq.lock); in amdgpu_irq_init()
228 adev->irq.msi_enabled = false; in amdgpu_irq_init()
230 if (amdgpu_msi_ok(adev)) { in amdgpu_irq_init()
231 int ret = pci_enable_msi(adev->pdev); in amdgpu_irq_init()
233 adev->irq.msi_enabled = true; in amdgpu_irq_init()
234 dev_dbg(adev->dev, "amdgpu: using MSI.\n"); in amdgpu_irq_init()
238 if (!amdgpu_device_has_dc_support(adev)) { in amdgpu_irq_init()
239 if (!adev->enable_virtual_display) in amdgpu_irq_init()
242 adev->ddev->vblank_disable_immediate = true; in amdgpu_irq_init()
244 r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc); in amdgpu_irq_init()
249 INIT_WORK(&adev->hotplug_work, in amdgpu_irq_init()
253 INIT_WORK(&adev->irq.ih1_work, amdgpu_irq_handle_ih1); in amdgpu_irq_init()
254 INIT_WORK(&adev->irq.ih2_work, amdgpu_irq_handle_ih2); in amdgpu_irq_init()
256 adev->irq.installed = true; in amdgpu_irq_init()
257 r = drm_irq_install(adev->ddev, adev->ddev->pdev->irq); in amdgpu_irq_init()
259 adev->irq.installed = false; in amdgpu_irq_init()
260 if (!amdgpu_device_has_dc_support(adev)) in amdgpu_irq_init()
261 flush_work(&adev->hotplug_work); in amdgpu_irq_init()
264 adev->ddev->max_vblank_count = 0x00ffffff; in amdgpu_irq_init()
279 void amdgpu_irq_fini(struct amdgpu_device *adev) in amdgpu_irq_fini() argument
283 if (adev->irq.installed) { in amdgpu_irq_fini()
284 drm_irq_uninstall(adev->ddev); in amdgpu_irq_fini()
285 adev->irq.installed = false; in amdgpu_irq_fini()
286 if (adev->irq.msi_enabled) in amdgpu_irq_fini()
287 pci_disable_msi(adev->pdev); in amdgpu_irq_fini()
288 if (!amdgpu_device_has_dc_support(adev)) in amdgpu_irq_fini()
289 flush_work(&adev->hotplug_work); in amdgpu_irq_fini()
293 if (!adev->irq.client[i].sources) in amdgpu_irq_fini()
297 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_fini()
307 adev->irq.client[i].sources[j] = NULL; in amdgpu_irq_fini()
310 kfree(adev->irq.client[i].sources); in amdgpu_irq_fini()
311 adev->irq.client[i].sources = NULL; in amdgpu_irq_fini()
328 int amdgpu_irq_add_id(struct amdgpu_device *adev, in amdgpu_irq_add_id() argument
341 if (!adev->irq.client[client_id].sources) { in amdgpu_irq_add_id()
342 adev->irq.client[client_id].sources = in amdgpu_irq_add_id()
346 if (!adev->irq.client[client_id].sources) in amdgpu_irq_add_id()
350 if (adev->irq.client[client_id].sources[src_id] != NULL) in amdgpu_irq_add_id()
364 adev->irq.client[client_id].sources[src_id] = source; in amdgpu_irq_add_id()
376 void amdgpu_irq_dispatch(struct amdgpu_device *adev, in amdgpu_irq_dispatch() argument
387 amdgpu_ih_decode_iv(adev, &entry); in amdgpu_irq_dispatch()
389 trace_amdgpu_iv(ih - &adev->irq.ih, &entry); in amdgpu_irq_dispatch()
400 } else if (adev->irq.virq[src_id]) { in amdgpu_irq_dispatch()
401 generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id)); in amdgpu_irq_dispatch()
403 } else if (!adev->irq.client[client_id].sources) { in amdgpu_irq_dispatch()
407 } else if ((src = adev->irq.client[client_id].sources[src_id])) { in amdgpu_irq_dispatch()
408 r = src->funcs->process(adev, src, &entry); in amdgpu_irq_dispatch()
420 amdgpu_amdkfd_interrupt(adev, entry.iv_entry); in amdgpu_irq_dispatch()
432 int amdgpu_irq_update(struct amdgpu_device *adev, in amdgpu_irq_update() argument
439 spin_lock_irqsave(&adev->irq.lock, irqflags); in amdgpu_irq_update()
443 if (amdgpu_irq_enabled(adev, src, type)) in amdgpu_irq_update()
448 r = src->funcs->set(adev, src, type, state); in amdgpu_irq_update()
449 spin_unlock_irqrestore(&adev->irq.lock, irqflags); in amdgpu_irq_update()
461 void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev) in amdgpu_irq_gpu_reset_resume_helper() argument
466 if (!adev->irq.client[i].sources) in amdgpu_irq_gpu_reset_resume_helper()
470 struct amdgpu_irq_src *src = adev->irq.client[i].sources[j]; in amdgpu_irq_gpu_reset_resume_helper()
475 amdgpu_irq_update(adev, src, k); in amdgpu_irq_gpu_reset_resume_helper()
492 int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_get() argument
495 if (!adev->ddev->irq_enabled) in amdgpu_irq_get()
505 return amdgpu_irq_update(adev, src, type); in amdgpu_irq_get()
522 int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_put() argument
525 if (!adev->ddev->irq_enabled) in amdgpu_irq_put()
535 return amdgpu_irq_update(adev, src, type); in amdgpu_irq_put()
553 bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src, in amdgpu_irq_enabled() argument
556 if (!adev->ddev->irq_enabled) in amdgpu_irq_enabled()
626 int amdgpu_irq_add_domain(struct amdgpu_device *adev) in amdgpu_irq_add_domain() argument
628 adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID, in amdgpu_irq_add_domain()
629 &amdgpu_hw_irqdomain_ops, adev); in amdgpu_irq_add_domain()
630 if (!adev->irq.domain) { in amdgpu_irq_add_domain()
646 void amdgpu_irq_remove_domain(struct amdgpu_device *adev) in amdgpu_irq_remove_domain() argument
648 if (adev->irq.domain) { in amdgpu_irq_remove_domain()
649 irq_domain_remove(adev->irq.domain); in amdgpu_irq_remove_domain()
650 adev->irq.domain = NULL; in amdgpu_irq_remove_domain()
667 unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id) in amdgpu_irq_create_mapping() argument
669 adev->irq.virq[src_id] = irq_create_mapping(adev->irq.domain, src_id); in amdgpu_irq_create_mapping()
671 return adev->irq.virq[src_id]; in amdgpu_irq_create_mapping()