Lines Matching refs:gfx

42 	bit += mec * adev->gfx.mec.num_pipe_per_mec  in amdgpu_gfx_mec_queue_to_bit()
43 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
44 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
53 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_bit_to_mec_queue()
54 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_bit_to_mec_queue()
55 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_bit_to_mec_queue()
56 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_bit_to_mec_queue()
57 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_bit_to_mec_queue()
65 adev->gfx.mec.queue_bitmap); in amdgpu_gfx_is_mec_queue_enabled()
73 bit += me * adev->gfx.me.num_pipe_per_me in amdgpu_gfx_me_queue_to_bit()
74 * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
75 bit += pipe * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
84 *queue = bit % adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_bit_to_me_queue()
85 *pipe = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()
86 % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()
87 *me = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()
88 / adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()
95 adev->gfx.me.queue_bitmap); in amdgpu_gfx_is_me_queue_enabled()
111 i = ffs(adev->gfx.scratch.free_mask); in amdgpu_gfx_scratch_get()
112 if (i != 0 && i <= adev->gfx.scratch.num_reg) { in amdgpu_gfx_scratch_get()
114 adev->gfx.scratch.free_mask &= ~(1u << i); in amdgpu_gfx_scratch_get()
115 *reg = adev->gfx.scratch.reg_base + i; in amdgpu_gfx_scratch_get()
131 adev->gfx.scratch.free_mask |= 1u << (reg - adev->gfx.scratch.reg_base); in amdgpu_gfx_scratch_free()
191 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_multipipe_capable()
201 queue = i % adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_compute_queue_acquire()
202 pipe = (i / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_compute_queue_acquire()
203 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
204 mec = (i / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_compute_queue_acquire()
205 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
208 if (mec >= adev->gfx.mec.num_mec) in amdgpu_gfx_compute_queue_acquire()
214 set_bit(i, adev->gfx.mec.queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
218 set_bit(i, adev->gfx.mec.queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
223 adev->gfx.num_compute_rings = in amdgpu_gfx_compute_queue_acquire()
224 bitmap_weight(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in amdgpu_gfx_compute_queue_acquire()
228 if (WARN_ON(adev->gfx.num_compute_rings > AMDGPU_MAX_COMPUTE_RINGS)) in amdgpu_gfx_compute_queue_acquire()
229 adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS; in amdgpu_gfx_compute_queue_acquire()
237 queue = i % adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
238 pipe = (i / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_graphics_queue_acquire()
239 % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_graphics_queue_acquire()
240 me = (i / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_graphics_queue_acquire()
241 / adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_graphics_queue_acquire()
243 if (me >= adev->gfx.me.num_me) in amdgpu_gfx_graphics_queue_acquire()
248 set_bit(i, adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
252 adev->gfx.num_gfx_rings = in amdgpu_gfx_graphics_queue_acquire()
253 bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES); in amdgpu_gfx_graphics_queue_acquire()
262 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire()
263 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
264 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_kiq_acquire()
267 if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap)) in amdgpu_gfx_kiq_acquire()
295 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init_ring()
332 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_fini()
342 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init()
371 ring = &adev->gfx.kiq.ring; in amdgpu_gfx_mqd_sw_init()
387 adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
388 if (!adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]) in amdgpu_gfx_mqd_sw_init()
394 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_init()
395 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_init()
406 adev->gfx.me.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
407 if (!adev->gfx.me.mqd_backup[i]) in amdgpu_gfx_mqd_sw_init()
414 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_init()
415 ring = &adev->gfx.compute_ring[i]; in amdgpu_gfx_mqd_sw_init()
426 adev->gfx.mec.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
427 if (!adev->gfx.mec.mqd_backup[i]) in amdgpu_gfx_mqd_sw_init()
441 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
442 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_fini()
443 kfree(adev->gfx.me.mqd_backup[i]); in amdgpu_gfx_mqd_sw_fini()
450 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
451 ring = &adev->gfx.compute_ring[i]; in amdgpu_gfx_mqd_sw_fini()
452 kfree(adev->gfx.mec.mqd_backup[i]); in amdgpu_gfx_mqd_sw_fini()
458 ring = &adev->gfx.kiq.ring; in amdgpu_gfx_mqd_sw_fini()
460 kfree(adev->gfx.me.mqd_backup[AMDGPU_MAX_GFX_RINGS]); in amdgpu_gfx_mqd_sw_fini()
461 kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]); in amdgpu_gfx_mqd_sw_fini()
469 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_disable_kcq()
477 adev->gfx.num_compute_rings)) in amdgpu_gfx_disable_kcq()
480 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_gfx_disable_kcq()
481 kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.compute_ring[i], in amdgpu_gfx_disable_kcq()
489 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_enable_kcq()
490 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in amdgpu_gfx_enable_kcq()
498 if (!test_bit(i, adev->gfx.mec.queue_bitmap)) in amdgpu_gfx_enable_kcq()
516 adev->gfx.num_compute_rings + in amdgpu_gfx_enable_kcq()
524 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_gfx_enable_kcq()
525 kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.compute_ring[i]); in amdgpu_gfx_enable_kcq()
556 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_off_ctrl()
559 adev->gfx.gfx_off_req_count++; in amdgpu_gfx_off_ctrl()
560 else if (adev->gfx.gfx_off_req_count > 0) in amdgpu_gfx_off_ctrl()
561 adev->gfx.gfx_off_req_count--; in amdgpu_gfx_off_ctrl()
563 if (enable && !adev->gfx.gfx_off_state && !adev->gfx.gfx_off_req_count) { in amdgpu_gfx_off_ctrl()
564 schedule_delayed_work(&adev->gfx.gfx_off_delay_work, GFX_OFF_DELAY_ENABLE); in amdgpu_gfx_off_ctrl()
565 } else if (!enable && adev->gfx.gfx_off_state) { in amdgpu_gfx_off_ctrl()
567 adev->gfx.gfx_off_state = false; in amdgpu_gfx_off_ctrl()
570 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_off_ctrl()