209 union power_info {  union
254 	union power_info *power_info;  in amdgpu_get_platform_caps()  local
262 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_get_platform_caps()
264 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
265 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
266 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
284 	union power_info *power_info;  in amdgpu_parse_extended_power_table()  local
295 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_parse_extended_power_table()
298 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
300 		if (power_info->pplib3.usFanTableOffset) {  in amdgpu_parse_extended_power_table()
302 						      le16_to_cpu(power_info->pplib3.usFanTableOffset));  in amdgpu_parse_extended_power_table()
328 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
330 		if (power_info->pplib4.usVddcDependencyOnSCLKOffset) {  in amdgpu_parse_extended_power_table()
333 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnSCLKOffset));  in amdgpu_parse_extended_power_table()
341 		if (power_info->pplib4.usVddciDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
344 				 le16_to_cpu(power_info->pplib4.usVddciDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
352 		if (power_info->pplib4.usVddcDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
355 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
363 		if (power_info->pplib4.usMvddDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
366 				 le16_to_cpu(power_info->pplib4.usMvddDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
374 		if (power_info->pplib4.usMaxClockVoltageOnDCOffset) {  in amdgpu_parse_extended_power_table()
378 				 le16_to_cpu(power_info->pplib4.usMaxClockVoltageOnDCOffset));  in amdgpu_parse_extended_power_table()
392 		if (power_info->pplib4.usVddcPhaseShedLimitsTableOffset) {  in amdgpu_parse_extended_power_table()
396 				 le16_to_cpu(power_info->pplib4.usVddcPhaseShedLimitsTableOffset));  in amdgpu_parse_extended_power_table()
425 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
427 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
428 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
430 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
436 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
437 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
438 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
439 		if (power_info->pplib5.usCACLeakageTableOffset) {  in amdgpu_parse_extended_power_table()
443 				 le16_to_cpu(power_info->pplib5.usCACLeakageTableOffset));  in amdgpu_parse_extended_power_table()
474 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
478 			 le16_to_cpu(power_info->pplib3.usExtendendedHeaderOffset));  in amdgpu_parse_extended_power_table()