109 	if (rps == adev->pm.dpm.current_ps)  in amdgpu_dpm_print_ps_status()
111 	if (rps == adev->pm.dpm.requested_ps)  in amdgpu_dpm_print_ps_status()
113 	if (rps == adev->pm.dpm.boot_ps)  in amdgpu_dpm_print_ps_status()
124 	adev->pm.dpm.new_active_crtcs = 0;  in amdgpu_dpm_get_active_displays()
125 	adev->pm.dpm.new_active_crtc_count = 0;  in amdgpu_dpm_get_active_displays()
131 				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);  in amdgpu_dpm_get_active_displays()
132 				adev->pm.dpm.new_active_crtc_count++;  in amdgpu_dpm_get_active_displays()
264 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
265 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
266 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
303 			adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;  in amdgpu_parse_extended_power_table()
304 			adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);  in amdgpu_parse_extended_power_table()
305 			adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);  in amdgpu_parse_extended_power_table()
306 			adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);  in amdgpu_parse_extended_power_table()
307 			adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin);  in amdgpu_parse_extended_power_table()
308 			adev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed);  in amdgpu_parse_extended_power_table()
309 			adev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh);  in amdgpu_parse_extended_power_table()
311 				adev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax);  in amdgpu_parse_extended_power_table()
313 				adev->pm.dpm.fan.t_max = 10900;  in amdgpu_parse_extended_power_table()
314 			adev->pm.dpm.fan.cycle_delay = 100000;  in amdgpu_parse_extended_power_table()
316 				adev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode;  in amdgpu_parse_extended_power_table()
317 				adev->pm.dpm.fan.default_max_fan_pwm =  in amdgpu_parse_extended_power_table()
319 				adev->pm.dpm.fan.default_fan_output_sensitivity = 4836;  in amdgpu_parse_extended_power_table()
320 				adev->pm.dpm.fan.fan_output_sensitivity =  in amdgpu_parse_extended_power_table()
323 			adev->pm.dpm.fan.ucode_fan_control = true;  in amdgpu_parse_extended_power_table()
334 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in amdgpu_parse_extended_power_table()
345 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
356 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
367 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
380 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk =  in amdgpu_parse_extended_power_table()
383 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =  in amdgpu_parse_extended_power_table()
386 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc =  in amdgpu_parse_extended_power_table()
388 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci =  in amdgpu_parse_extended_power_table()
399 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =  in amdgpu_parse_extended_power_table()
403 			if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {  in amdgpu_parse_extended_power_table()
410 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =  in amdgpu_parse_extended_power_table()
412 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =  in amdgpu_parse_extended_power_table()
414 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =  in amdgpu_parse_extended_power_table()
419 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.count =  in amdgpu_parse_extended_power_table()
427 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
428 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
429 		adev->pm.dpm.near_tdp_limit_adjusted = adev->pm.dpm.near_tdp_limit;  in amdgpu_parse_extended_power_table()
430 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
431 		if (adev->pm.dpm.tdp_od_limit)  in amdgpu_parse_extended_power_table()
432 			adev->pm.dpm.power_control = true;  in amdgpu_parse_extended_power_table()
434 			adev->pm.dpm.power_control = false;  in amdgpu_parse_extended_power_table()
435 		adev->pm.dpm.tdp_adjustment = 0;  in amdgpu_parse_extended_power_table()
436 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
437 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
438 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
446 			adev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL);  in amdgpu_parse_extended_power_table()
447 			if (!adev->pm.dpm.dyn_state.cac_leakage_table.entries) {  in amdgpu_parse_extended_power_table()
453 				if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {  in amdgpu_parse_extended_power_table()
454 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 =  in amdgpu_parse_extended_power_table()
456 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 =  in amdgpu_parse_extended_power_table()
458 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 =  in amdgpu_parse_extended_power_table()
461 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc =  in amdgpu_parse_extended_power_table()
463 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage =  in amdgpu_parse_extended_power_table()
469 			adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries;  in amdgpu_parse_extended_power_table()
500 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
502 			if (!adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
506 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
514 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk =  in amdgpu_parse_extended_power_table()
516 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =  in amdgpu_parse_extended_power_table()
518 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
523 			adev->pm.dpm.num_of_vce_states =  in amdgpu_parse_extended_power_table()
526 			for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {  in amdgpu_parse_extended_power_table()
530 				adev->pm.dpm.vce_states[i].evclk =  in amdgpu_parse_extended_power_table()
532 				adev->pm.dpm.vce_states[i].ecclk =  in amdgpu_parse_extended_power_table()
534 				adev->pm.dpm.vce_states[i].clk_idx =  in amdgpu_parse_extended_power_table()
536 				adev->pm.dpm.vce_states[i].pstate =  in amdgpu_parse_extended_power_table()
555 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
557 			if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
561 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
568 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk =  in amdgpu_parse_extended_power_table()
570 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk =  in amdgpu_parse_extended_power_table()
572 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
587 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
589 			if (!adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
593 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
597 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =  in amdgpu_parse_extended_power_table()
599 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
610 			adev->pm.dpm.dyn_state.ppm_table =  in amdgpu_parse_extended_power_table()
612 			if (!adev->pm.dpm.dyn_state.ppm_table) {  in amdgpu_parse_extended_power_table()
616 			adev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign;  in amdgpu_parse_extended_power_table()
617 			adev->pm.dpm.dyn_state.ppm_table->cpu_core_number =  in amdgpu_parse_extended_power_table()
619 			adev->pm.dpm.dyn_state.ppm_table->platform_tdp =  in amdgpu_parse_extended_power_table()
621 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp =  in amdgpu_parse_extended_power_table()
623 			adev->pm.dpm.dyn_state.ppm_table->platform_tdc =  in amdgpu_parse_extended_power_table()
625 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc =  in amdgpu_parse_extended_power_table()
627 			adev->pm.dpm.dyn_state.ppm_table->apu_tdp =  in amdgpu_parse_extended_power_table()
629 			adev->pm.dpm.dyn_state.ppm_table->dgpu_tdp =  in amdgpu_parse_extended_power_table()
631 			adev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power =  in amdgpu_parse_extended_power_table()
633 			adev->pm.dpm.dyn_state.ppm_table->tj_max =  in amdgpu_parse_extended_power_table()
645 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
647 			if (!adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
651 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
655 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =  in amdgpu_parse_extended_power_table()
657 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
668 			adev->pm.dpm.dyn_state.cac_tdp_table =  in amdgpu_parse_extended_power_table()
670 			if (!adev->pm.dpm.dyn_state.cac_tdp_table) {  in amdgpu_parse_extended_power_table()
678 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit =  in amdgpu_parse_extended_power_table()
685 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255;  in amdgpu_parse_extended_power_table()
688 			adev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP);  in amdgpu_parse_extended_power_table()
689 			adev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp =  in amdgpu_parse_extended_power_table()
691 			adev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC);  in amdgpu_parse_extended_power_table()
692 			adev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit =  in amdgpu_parse_extended_power_table()
694 			adev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit =  in amdgpu_parse_extended_power_table()
696 			adev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage =  in amdgpu_parse_extended_power_table()
698 			adev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage =  in amdgpu_parse_extended_power_table()
707 					&adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk,  in amdgpu_parse_extended_power_table()
710 				kfree(adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk.entries);  in amdgpu_parse_extended_power_table()
721 	struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state;  in amdgpu_free_extended_power_table()
901 	if (idx < adev->pm.dpm.num_of_vce_states)  in amdgpu_get_vce_clock_state()
902 		return &adev->pm.dpm.vce_states[idx];  in amdgpu_get_vce_clock_state()