475 	uint32_t *config, no_regs = 0;  in amdgpu_debugfs_gca_config_read()  local
485 	config[no_regs++] = 3;  in amdgpu_debugfs_gca_config_read()
486 	config[no_regs++] = adev->gfx.config.max_shader_engines;  in amdgpu_debugfs_gca_config_read()
487 	config[no_regs++] = adev->gfx.config.max_tile_pipes;  in amdgpu_debugfs_gca_config_read()
488 	config[no_regs++] = adev->gfx.config.max_cu_per_sh;  in amdgpu_debugfs_gca_config_read()
489 	config[no_regs++] = adev->gfx.config.max_sh_per_se;  in amdgpu_debugfs_gca_config_read()
490 	config[no_regs++] = adev->gfx.config.max_backends_per_se;  in amdgpu_debugfs_gca_config_read()
491 	config[no_regs++] = adev->gfx.config.max_texture_channel_caches;  in amdgpu_debugfs_gca_config_read()
492 	config[no_regs++] = adev->gfx.config.max_gprs;  in amdgpu_debugfs_gca_config_read()
493 	config[no_regs++] = adev->gfx.config.max_gs_threads;  in amdgpu_debugfs_gca_config_read()
494 	config[no_regs++] = adev->gfx.config.max_hw_contexts;  in amdgpu_debugfs_gca_config_read()
495 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend;  in amdgpu_debugfs_gca_config_read()
496 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend;  in amdgpu_debugfs_gca_config_read()
497 	config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
498 	config[no_regs++] = adev->gfx.config.sc_earlyz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
499 	config[no_regs++] = adev->gfx.config.num_tile_pipes;  in amdgpu_debugfs_gca_config_read()
500 	config[no_regs++] = adev->gfx.config.backend_enable_mask;  in amdgpu_debugfs_gca_config_read()
501 	config[no_regs++] = adev->gfx.config.mem_max_burst_length_bytes;  in amdgpu_debugfs_gca_config_read()
502 	config[no_regs++] = adev->gfx.config.mem_row_size_in_kb;  in amdgpu_debugfs_gca_config_read()
503 	config[no_regs++] = adev->gfx.config.shader_engine_tile_size;  in amdgpu_debugfs_gca_config_read()
504 	config[no_regs++] = adev->gfx.config.num_gpus;  in amdgpu_debugfs_gca_config_read()
505 	config[no_regs++] = adev->gfx.config.multi_gpu_tile_size;  in amdgpu_debugfs_gca_config_read()
506 	config[no_regs++] = adev->gfx.config.mc_arb_ramcfg;  in amdgpu_debugfs_gca_config_read()
507 	config[no_regs++] = adev->gfx.config.gb_addr_config;  in amdgpu_debugfs_gca_config_read()
508 	config[no_regs++] = adev->gfx.config.num_rbs;  in amdgpu_debugfs_gca_config_read()
511 	config[no_regs++] = adev->rev_id;  in amdgpu_debugfs_gca_config_read()
512 	config[no_regs++] = adev->pg_flags;  in amdgpu_debugfs_gca_config_read()
513 	config[no_regs++] = adev->cg_flags;  in amdgpu_debugfs_gca_config_read()
516 	config[no_regs++] = adev->family;  in amdgpu_debugfs_gca_config_read()
517 	config[no_regs++] = adev->external_rev_id;  in amdgpu_debugfs_gca_config_read()
520 	config[no_regs++] = adev->pdev->device;  in amdgpu_debugfs_gca_config_read()
521 	config[no_regs++] = adev->pdev->revision;  in amdgpu_debugfs_gca_config_read()
522 	config[no_regs++] = adev->pdev->subsystem_device;  in amdgpu_debugfs_gca_config_read()
523 	config[no_regs++] = adev->pdev->subsystem_vendor;  in amdgpu_debugfs_gca_config_read()
525 	while (size && (*pos < no_regs * 4)) {  in amdgpu_debugfs_gca_config_read()