192 	struct i2s_platform_data *i2s_pdata = NULL;  in acp_hw_init()  local
245 	i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL);  in acp_hw_init()
246 	if (i2s_pdata == NULL) {  in acp_hw_init()
253 		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |  in acp_hw_init()
257 		i2s_pdata[0].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;  in acp_hw_init()
259 	i2s_pdata[0].cap = DWC_I2S_PLAY;  in acp_hw_init()
260 	i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000;  in acp_hw_init()
261 	i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET;  in acp_hw_init()
262 	i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET;  in acp_hw_init()
265 		i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |  in acp_hw_init()
270 		i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |  in acp_hw_init()
274 	i2s_pdata[1].cap = DWC_I2S_RECORD;  in acp_hw_init()
275 	i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000;  in acp_hw_init()
276 	i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;  in acp_hw_init()
277 	i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET;  in acp_hw_init()
279 	i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;  in acp_hw_init()
282 		i2s_pdata[2].quirks |= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;  in acp_hw_init()
288 	i2s_pdata[2].cap = DWC_I2S_PLAY | DWC_I2S_RECORD;  in acp_hw_init()
289 	i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000;  in acp_hw_init()
290 	i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET;  in acp_hw_init()
291 	i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET;  in acp_hw_init()
327 	adev->acp.acp_cell[1].platform_data = &i2s_pdata[0];  in acp_hw_init()
333 	adev->acp.acp_cell[2].platform_data = &i2s_pdata[1];  in acp_hw_init()
339 	adev->acp.acp_cell[3].platform_data = &i2s_pdata[2];  in acp_hw_init()
401 	kfree(i2s_pdata);  in acp_hw_init()