Lines Matching defs:amdgpu_nbio_funcs

678 struct amdgpu_nbio_funcs {  struct
679 	const struct nbio_hdp_flush_reg *hdp_flush_reg;
680 	u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
681 	u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
682 	u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
683 	u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
684 	u32 (*get_rev_id)(struct amdgpu_device *adev);
685 	void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
686 	void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
687 	u32 (*get_memsize)(struct amdgpu_device *adev);
688 	void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
690 	void (*vcn_doorbell_range)(struct amdgpu_device *adev, bool use_doorbell,
692 	void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
694 	void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
696 	void (*ih_doorbell_range)(struct amdgpu_device *adev,
698 	void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
700 	void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
702 	void (*get_clockgating_state)(struct amdgpu_device *adev,
704 	void (*ih_control)(struct amdgpu_device *adev);
705 	void (*init_registers)(struct amdgpu_device *adev);
706 	void (*detect_hw_virt)(struct amdgpu_device *adev);
707 	void (*remap_hdp_registers)(struct amdgpu_device *adev);