16 struct sa1100_gpio_chip {  struct
26 #define sa1100_gpio_chip(x) container_of(x, struct sa1100_gpio_chip, chip)  argument
41 	return readl_relaxed(sa1100_gpio_chip(chip)->membase + R_GPLR) &  in sa1100_gpio_get()
49 	writel_relaxed(BIT(offset), sa1100_gpio_chip(chip)->membase + reg);  in sa1100_gpio_set()
54 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_get_direction()
61 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_direction_input()
73 	void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR;  in sa1100_direction_output()
86 	return sa1100_gpio_chip(chip)->irqbase + offset;  in sa1100_to_irq()
89 static struct sa1100_gpio_chip sa1100_gpio_chip = {  variable
110 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)  in sa1100_update_edge_regs()
124 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_type()
152 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_ack()
159 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_mask()
169 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_unmask()
179 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_wake()
205 	struct sa1100_gpio_chip *sgc = d->host_data;  in sa1100_gpio_irqdomain_map()
228 	struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);  in sa1100_gpio_handler()
254 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_gpio_suspend()
273 	sa1100_update_edge_regs(&sa1100_gpio_chip);  in sa1100_gpio_resume()
308 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_init_gpio()
316 	gpiochip_add_data(&sa1100_gpio_chip.chip, NULL);  in sa1100_init_gpio()