139 static void socfpga_fpga_writel(struct socfpga_fpga_priv *priv, u32 reg_offset,  in socfpga_fpga_writel()  function
169 	socfpga_fpga_writel(priv, offset, val);  in socfpga_fpga_set_bitsl()
179 	socfpga_fpga_writel(priv, offset, val);  in socfpga_fpga_clr_bitsl()
201 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_DCLKSTAT_OFST,  in socfpga_fpga_clear_done_status()
220 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_DCLKCNT_OFST, count);  in socfpga_fpga_dclk_set_and_wait_clear()
256 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTTYPE_LEVEL_OFST, 0);  in socfpga_fpga_enable_irqs()
259 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INT_POL_OFST, irqs);  in socfpga_fpga_enable_irqs()
262 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST, irqs);  in socfpga_fpga_enable_irqs()
265 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTMSK_OFST, 0);  in socfpga_fpga_enable_irqs()
268 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTEN_OFST, irqs);  in socfpga_fpga_enable_irqs()
273 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_INTEN_OFST, 0);  in socfpga_fpga_disable_irqs()
353 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);  in socfpga_fpga_cfg_mode_set()
380 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);  in socfpga_fpga_reset()
387 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg);  in socfpga_fpga_reset()
420 	socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_GPIO_PORTA_EOI_OFST,  in socfpga_fpga_ops_configure_init()