Lines Matching refs:reg_write
527 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() function
554 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
580 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
672 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
695 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
1035 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1036 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1214 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1216 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1217 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1264 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1411 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1570 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1571 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1572 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1754 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1902 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
2007 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2036 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2039 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2044 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2045 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2077 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2098 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2110 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2126 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2135 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2168 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2234 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2237 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2291 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2317 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2320 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2321 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2325 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2335 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2340 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2346 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2348 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2351 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2352 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2353 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2403 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2404 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2406 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2408 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2422 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2424 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2428 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2509 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2601 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2603 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2671 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2681 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2690 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2695 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2696 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2711 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2716 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2925 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2926 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2927 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2928 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
3050 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3051 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3066 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3067 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3068 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3089 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3095 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3464 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3658 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3661 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3667 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3674 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3758 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3833 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3834 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()