Lines Matching refs:dev_err
359 dev_err(edac->dev, "no MCU resource address\n"); in xgene_edac_mc_add()
364 dev_err(edac->dev, "unable to map MCU resource\n"); in xgene_edac_mc_add()
371 dev_err(edac->dev, "no memory-controller property\n"); in xgene_edac_mc_add()
414 dev_err(edac->dev, "edac_mc_add_mc failed\n"); in xgene_edac_mc_add()
531 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
538 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
540 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
543 dev_err(edac_dev->dev, "L1 TLB multiple hit\n"); in xgene_edac_pmd_l1_check()
546 dev_err(edac_dev->dev, "Way select multiple hit\n"); in xgene_edac_pmd_l1_check()
549 dev_err(edac_dev->dev, "Physical tag parity error\n"); in xgene_edac_pmd_l1_check()
553 dev_err(edac_dev->dev, "L1 data parity error\n"); in xgene_edac_pmd_l1_check()
556 dev_err(edac_dev->dev, "L1 pre-decode parity error\n"); in xgene_edac_pmd_l1_check()
571 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
578 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
580 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
583 dev_err(edac_dev->dev, "Load tag error\n"); in xgene_edac_pmd_l1_check()
586 dev_err(edac_dev->dev, "Load data error\n"); in xgene_edac_pmd_l1_check()
589 dev_err(edac_dev->dev, "WSL multihit error\n"); in xgene_edac_pmd_l1_check()
592 dev_err(edac_dev->dev, "Store tag error\n"); in xgene_edac_pmd_l1_check()
595 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
599 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
615 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
623 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
625 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
628 dev_err(edac_dev->dev, "Stage 1 UTB hit error\n"); in xgene_edac_pmd_l1_check()
631 dev_err(edac_dev->dev, "Stage 1 UTB miss error\n"); in xgene_edac_pmd_l1_check()
634 dev_err(edac_dev->dev, "Stage 1 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
637 dev_err(edac_dev->dev, "TMO operation single bank error\n"); in xgene_edac_pmd_l1_check()
640 dev_err(edac_dev->dev, "Stage 2 UTB error\n"); in xgene_edac_pmd_l1_check()
643 dev_err(edac_dev->dev, "Stage 2 UTB miss error\n"); in xgene_edac_pmd_l1_check()
646 dev_err(edac_dev->dev, "Stage 2 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
649 dev_err(edac_dev->dev, "TMO operation multiple bank error\n"); in xgene_edac_pmd_l1_check()
675 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
678 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
687 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l2_check()
689 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l2_check()
691 dev_err(edac_dev->dev, "One or more uncorrectable error\n"); in xgene_edac_pmd_l2_check()
693 dev_err(edac_dev->dev, "Multiple uncorrectable error\n"); in xgene_edac_pmd_l2_check()
697 dev_err(edac_dev->dev, "Outbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
700 dev_err(edac_dev->dev, "Inbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
703 dev_err(edac_dev->dev, "Tag ECC error\n"); in xgene_edac_pmd_l2_check()
706 dev_err(edac_dev->dev, "Data ECC error\n"); in xgene_edac_pmd_l2_check()
727 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
902 dev_err(edac->dev, "no pmd-controller property\n"); in xgene_edac_pmd_add()
937 dev_err(edac->dev, "no PMD resource address\n"); in xgene_edac_pmd_add()
942 dev_err(edac->dev, in xgene_edac_pmd_add()
955 dev_err(edac->dev, "edac_device_add_device failed\n"); in xgene_edac_pmd_add()
1066 dev_err(edac_dev->dev, "L3C uncorrectable error\n"); in xgene_edac_l3_check()
1074 dev_err(edac_dev->dev, "L3C multiple hit error\n"); in xgene_edac_l3_check()
1076 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1079 dev_err(edac_dev->dev, "L3C multiple uncorrectable error\n"); in xgene_edac_l3_check()
1081 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1085 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1093 dev_err(edac_dev->dev, "L3C error address 0x%08X.%08X bank %d\n", in xgene_edac_l3_check()
1096 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1198 dev_err(edac->dev, "no L3 resource address\n"); in xgene_edac_l3_add()
1203 dev_err(edac->dev, in xgene_edac_l3_add()
1238 dev_err(edac->dev, "failed edac_device_add_device()\n"); in xgene_edac_l3_add()
1401 dev_err(edac_dev->dev, "XGIC transaction error\n"); in xgene_edac_iob_gic_report()
1403 dev_err(edac_dev->dev, "XGIC read size error\n"); in xgene_edac_iob_gic_report()
1405 dev_err(edac_dev->dev, "Multiple XGIC read size error\n"); in xgene_edac_iob_gic_report()
1407 dev_err(edac_dev->dev, "XGIC write size error\n"); in xgene_edac_iob_gic_report()
1409 dev_err(edac_dev->dev, "Multiple XGIC write size error\n"); in xgene_edac_iob_gic_report()
1411 dev_err(edac_dev->dev, "XGIC %s access @ 0x%08X (0x%08X)\n", in xgene_edac_iob_gic_report()
1424 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1433 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1445 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1454 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1488 dev_err(edac_dev->dev, "IOB bus access error(s)\n"); in xgene_edac_rb_report()
1494 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1498 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1502 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1506 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1521 dev_err(edac_dev->dev, "IOB bridge agent (BA) transaction error\n"); in xgene_edac_rb_report()
1523 dev_err(edac_dev->dev, "IOB BA write response error\n"); in xgene_edac_rb_report()
1525 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1528 dev_err(edac_dev->dev, "IOB BA XGIC poisoned write error\n"); in xgene_edac_rb_report()
1530 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1533 dev_err(edac_dev->dev, "IOB BA RBM poisoned write error\n"); in xgene_edac_rb_report()
1535 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1538 dev_err(edac_dev->dev, "IOB BA write error\n"); in xgene_edac_rb_report()
1540 dev_err(edac_dev->dev, "Multiple IOB BA write error\n"); in xgene_edac_rb_report()
1542 dev_err(edac_dev->dev, "IOB BA transaction error\n"); in xgene_edac_rb_report()
1544 dev_err(edac_dev->dev, "Multiple IOB BA transaction error\n"); in xgene_edac_rb_report()
1546 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1549 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1552 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1555 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1558 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1561 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1566 dev_err(edac_dev->dev, "IOB BA %s access at 0x%02X.%08X (0x%08X)\n", in xgene_edac_rb_report()
1570 dev_err(edac_dev->dev, "IOB BA requestor ID 0x%08X\n", in xgene_edac_rb_report()
1586 dev_err(edac_dev->dev, "IOB processing agent (PA) transaction error\n"); in xgene_edac_pa_report()
1588 dev_err(edac_dev->dev, "IOB PA read data RAM error\n"); in xgene_edac_pa_report()
1590 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1593 dev_err(edac_dev->dev, "IOB PA write data RAM error\n"); in xgene_edac_pa_report()
1595 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1598 dev_err(edac_dev->dev, "IOB PA transaction error\n"); in xgene_edac_pa_report()
1600 dev_err(edac_dev->dev, "Multiple IOB PA transaction error\n"); in xgene_edac_pa_report()
1602 dev_err(edac_dev->dev, "IOB PA transaction ID RAM error\n"); in xgene_edac_pa_report()
1604 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1615 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1629 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1674 dev_err(edac_dev->dev, "SoC memory parity error 0x%08X\n", in xgene_edac_soc_check()
1681 dev_err(edac_dev->dev, "%s memory parity error\n", in xgene_edac_soc_check()
1741 dev_err(edac->dev, "no SoC resource address\n"); in xgene_edac_soc_add()
1746 dev_err(edac->dev, in xgene_edac_soc_add()
1779 dev_err(edac->dev, "failed edac_device_add_device()\n"); in xgene_edac_soc_add()
1870 dev_err(edac->dev, "unable to get syscon regmap csw\n"); in xgene_edac_probe()
1878 dev_err(edac->dev, "unable to get syscon regmap mcba\n"); in xgene_edac_probe()
1886 dev_err(edac->dev, "unable to get syscon regmap mcbb\n"); in xgene_edac_probe()
1893 dev_err(edac->dev, "unable to get syscon regmap efuse\n"); in xgene_edac_probe()
1912 dev_err(&pdev->dev, "no PCP resource address\n"); in xgene_edac_probe()
1924 dev_err(&pdev->dev, "No IRQ resource\n"); in xgene_edac_probe()
1932 dev_err(&pdev->dev, in xgene_edac_probe()