171 	struct dimm_info *dimm;  in skx_get_dimm_config()  local
180 			dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,  in skx_get_dimm_config()
185 				ndimms += skx_get_dimm_info(mtr, amap, dimm, imc, i, j);  in skx_get_dimm_config()
187 				ndimms += skx_get_nvdimm_info(dimm, imc, i, j,  in skx_get_dimm_config()
456 	res->dimm = chan_rank / 4;  in skx_rir_decode()
460 		 res->addr, res->dimm, res->rank,  in skx_rir_decode()
506 	struct skx_dimm *dimm = &r->dev->imc[r->imc].chan[r->channel].dimms[r->dimm];  in skx_mad_decode()  local
507 	int bg0 = dimm->fine_grain_bank ? 6 : 13;  in skx_mad_decode()
509 	if (dimm->close_pg) {  in skx_mad_decode()
510 		r->row = skx_bits(r->rank_address, dimm->rowbits, skx_close_row);  in skx_mad_decode()
511 		r->column = skx_bits(r->rank_address, dimm->colbits, skx_close_column);  in skx_mad_decode()
513 		r->bank_address = skx_bank_bits(r->rank_address, 8, 9, dimm->bank_xor_enable, 22, 28);  in skx_mad_decode()
514 		r->bank_group = skx_bank_bits(r->rank_address, 6, 7, dimm->bank_xor_enable, 20, 21);  in skx_mad_decode()
516 		r->row = skx_bits(r->rank_address, dimm->rowbits, skx_open_row);  in skx_mad_decode()
517 		if (dimm->fine_grain_bank)  in skx_mad_decode()
518 			r->column = skx_bits(r->rank_address, dimm->colbits, skx_open_fine_column);  in skx_mad_decode()
520 			r->column = skx_bits(r->rank_address, dimm->colbits, skx_open_column);  in skx_mad_decode()
521 		r->bank_address = skx_bank_bits(r->rank_address, 18, 19, dimm->bank_xor_enable, 22, 23);  in skx_mad_decode()
522 		r->bank_group = skx_bank_bits(r->rank_address, bg0, 17, dimm->bank_xor_enable, 20, 21);  in skx_mad_decode()
524 	r->row &= (1u << dimm->rowbits) - 1;  in skx_mad_decode()