801 	int cs_mode = 0;  in f17_get_cs_mode()  local
804 		cs_mode |= CS_EVEN_PRIMARY;  in f17_get_cs_mode()
807 		cs_mode |= CS_ODD_PRIMARY;  in f17_get_cs_mode()
811 		cs_mode |= CS_ODD_SECONDARY;  in f17_get_cs_mode()
813 	return cs_mode;  in f17_get_cs_mode()
818 	int dimm, size0, size1, cs0, cs1, cs_mode;  in debug_display_dimm_sizes_df()  local
826 		cs_mode = f17_get_cs_mode(dimm, ctrl, pvt);  in debug_display_dimm_sizes_df()
828 		size0 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs0);  in debug_display_dimm_sizes_df()
829 		size1 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs1);  in debug_display_dimm_sizes_df()
1347 				  unsigned cs_mode, int cs_mask_nr)  in k8_dbam_to_chip_select()  argument
1352 		WARN_ON(cs_mode > 11);  in k8_dbam_to_chip_select()
1353 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in k8_dbam_to_chip_select()
1357 		WARN_ON(cs_mode > 10);  in k8_dbam_to_chip_select()
1383 		diff = cs_mode/3 + (unsigned)(cs_mode > 5);  in k8_dbam_to_chip_select()
1385 		return 32 << (cs_mode - diff);  in k8_dbam_to_chip_select()
1388 		WARN_ON(cs_mode > 6);  in k8_dbam_to_chip_select()
1389 		return 32 << cs_mode;  in k8_dbam_to_chip_select()
1514 				   unsigned cs_mode, int cs_mask_nr)  in f10_dbam_to_chip_select()  argument
1518 	WARN_ON(cs_mode > 11);  in f10_dbam_to_chip_select()
1521 		return ddr3_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1523 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1530 				   unsigned cs_mode, int cs_mask_nr)  in f15_dbam_to_chip_select()  argument
1532 	WARN_ON(cs_mode > 12);  in f15_dbam_to_chip_select()
1534 	return ddr3_cs_size(cs_mode, false);  in f15_dbam_to_chip_select()
1539 					unsigned cs_mode, int cs_mask_nr)  in f15_m60h_dbam_to_chip_select()  argument
1544 	WARN_ON(cs_mode > 12);  in f15_m60h_dbam_to_chip_select()
1547 		if (cs_mode > 9)  in f15_m60h_dbam_to_chip_select()
1550 		cs_size = ddr4_cs_size(cs_mode);  in f15_m60h_dbam_to_chip_select()
1556 		cs_size = ddr3_lrdimm_cs_size(cs_mode, rank_multiply);  in f15_m60h_dbam_to_chip_select()
1559 		if (cs_mode == 0x1)  in f15_m60h_dbam_to_chip_select()
1562 		cs_size = ddr3_cs_size(cs_mode, false);  in f15_m60h_dbam_to_chip_select()
1572 				unsigned cs_mode, int cs_mask_nr)  in f16_dbam_to_chip_select()  argument
1574 	WARN_ON(cs_mode > 12);  in f16_dbam_to_chip_select()
1576 	if (cs_mode == 6 || cs_mode == 8 ||  in f16_dbam_to_chip_select()
1577 	    cs_mode == 9 || cs_mode == 12)  in f16_dbam_to_chip_select()
1580 		return ddr3_cs_size(cs_mode, false);  in f16_dbam_to_chip_select()
1584 				    unsigned int cs_mode, int csrow_nr)  in f17_addr_mask_to_cs_size()  argument
1591 	if (!cs_mode)  in f17_addr_mask_to_cs_size()
1595 	if (!(cs_mode & CS_EVEN) && !(csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1599 	if (!(cs_mode & CS_ODD) && (csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1610 	if ((csrow_nr & 1) && (cs_mode & CS_ODD_SECONDARY))  in f17_addr_mask_to_cs_size()
2883 	u32 cs_mode, nr_pages;  in get_csrow_nr_pages()  local
2887 		cs_mode = DBAM_DIMM(csrow_nr, dbam);  in get_csrow_nr_pages()
2889 		cs_mode = f17_get_cs_mode(csrow_nr >> 1, dct, pvt);  in get_csrow_nr_pages()
2892 	nr_pages   = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr);  in get_csrow_nr_pages()
2896 		    csrow_nr_orig, dct,  cs_mode);  in get_csrow_nr_pages()