Lines Matching full:on
14 depends on HAS_IOMEM && EDAC_SUPPORT && RAS
38 This turns on debugging information for the entire EDAC subsystem.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
45 depends on CPU_SUP_AMD && X86_MCE_AMD
49 occurring on your machine in human-readable form.
57 depends on ACPI_APEI_GHES && (EDAC=y)
79 depends on AMD_NB && EDAC_DECODE_MCE
81 Support for error detection and correction of DRAM ECC errors on
86 depends on EDAC_AMD64
105 depends on PCI && X86_32
107 Support for error detection and correction on the AMD 76x
112 depends on PCI && X86_32
114 Support for error detection and correction on the Intel
119 depends on PCI && X86
121 Support for error detection and correction on the Intel
126 depends on PCI && X86_32
127 depends on BROKEN
129 Support for error detection and correction on the Intel
134 depends on PCI && X86_32
136 Support for error detection and correction on the Intel
141 depends on PCI && X86
143 Support for error detection and correction on the Intel
148 depends on PCI && X86
150 Support for error detection and correction on the Intel
155 depends on PCI && X86
157 Support for error detection and correction on the Intel
162 depends on PCI && X86
164 Support for error detection and correction on the Intel
169 depends on PCI && X86
171 Support for error detection and correction on the Intel
176 depends on PCI && X86
183 depends on PCI && X86 && X86_MCE_INTEL
186 i7 Core (Nehalem) Integrated Memory Controller that exists on
192 depends on PCI && X86_32
194 Support for error detection and correction on the Intel
199 depends on PCI && X86_32
201 Support for error detection and correction on the Radisys
206 depends on X86 && PCI
213 depends on X86 && PCI
220 depends on X86 && PCI
227 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG
234 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
235 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_SKX can't be y
246 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
247 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_I10NM can't be y
258 depends on PCI && X86_64 && X86_MCE_INTEL
260 Support for error detection and correction on the Intel
262 first used on the Apollo Lake platform and Denverton
263 micro-server but may appear on others in the future.
267 depends on FSL_SOC && EDAC=y
269 Support for error detection and correction on the Freescale
274 depends on ARCH_LAYERSCAPE || SOC_LS1021A
276 Support for error detection and correction on Freescale memory
277 controllers on Layerscape SoCs.
281 depends on MV64X60
283 Support for error detection and correction on the Marvell
288 depends on PPC_PASEMI && PCI
290 Support for error detection and correction on PA Semi
295 depends on PPC_CELL_COMMON
297 Support for error detection and correction on the
299 on platform without a hypervisor
303 depends on 4xx
305 This enables support for EDAC on the ECC memory used
312 depends on PCI && PPC_MAPLE
314 Support for error detection and correction on the
317 on some machine other than Maple.
321 depends on PCI && PPC_MAPLE
323 Support for error detection and correction on the
326 on some machine other than Maple.
330 depends on PPC64
332 Support for error detection and correction on the
339 depends on ARCH_HIGHBANK
341 Support for error detection and correction on the
346 depends on ARCH_HIGHBANK
348 Support for error detection and correction on the
353 depends on CPU_CAVIUM_OCTEON
355 Support for error detection and correction on the primary caches of
360 depends on CAVIUM_OCTEON_SOC
362 Support for error detection and correction on the
367 depends on CAVIUM_OCTEON_SOC
369 Support for error detection and correction on the
374 depends on PCI && CAVIUM_OCTEON_SOC
376 Support for error detection and correction on the
381 depends on ARM64
382 depends on PCI
384 Support for error detection and correction on the
391 depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10)
393 Support for error detection and correction on the
399 depends on EDAC_ALTERA=y
401 Support for error detection and correction on the
408 depends on EDAC_ALTERA=y && CACHE_L2X0
410 Support for error detection and correction on the
415 bool "Altera On-Chip RAM ECC"
416 depends on EDAC_ALTERA=y && SRAM && GENERIC_ALLOCATOR
418 Support for error detection and correction on the
419 Altera On-Chip RAM Memory for Altera SoCs.
423 depends on EDAC_ALTERA=y
425 Support for error detection and correction on the
430 depends on EDAC_ALTERA=y && MTD_NAND_DENALI
432 Support for error detection and correction on the
437 depends on EDAC_ALTERA=y && PL330_DMA=y
439 Support for error detection and correction on the
444 depends on EDAC_ALTERA=y && USB_DWC2
446 Support for error detection and correction on the
451 depends on EDAC_ALTERA=y && SPI_CADENCE_QUADSPI
453 Support for error detection and correction on the
458 depends on EDAC_ALTERA=y && MMC_DW
460 Support for error detection and correction on the
465 depends on EDAC=y && RISCV
467 Support for error detection and correction on the SiFive SoCs.
471 depends on MACH_MVEBU_V7
473 Support for error correction and detection on the Marvell Aramada XP
478 depends on ARCH_ZYNQ || ARCH_ZYNQMP
480 Support for error detection and correction on the Synopsys DDR
485 depends on (ARM64 || COMPILE_TEST)
487 Support for error detection and correction on the
492 depends on ARCH_KEYSTONE || SOC_DRA7XX
494 Support for error detection and correction on the
499 depends on ARCH_QCOM && QCOM_LLCC
501 Support for error detection and correction on the
513 depends on MACH_ASPEED_G5
515 Support for error detection and correction on the Aspeed AST 2500 SoC.
522 depends on ARM64 && ((MELLANOX_PLATFORM && ACPI) || COMPILE_TEST)
524 Support for error detection and correction on the