Lines Matching refs:xt

1636 				 struct dma_interleaved_template *xt,  in xilinx_vdma_dma_prep_interleaved()  argument
1644 if (!is_slave_direction(xt->dir)) in xilinx_vdma_dma_prep_interleaved()
1647 if (!xt->numf || !xt->sgl[0].size) in xilinx_vdma_dma_prep_interleaved()
1650 if (xt->frame_size != 1) in xilinx_vdma_dma_prep_interleaved()
1669 hw->vsize = xt->numf; in xilinx_vdma_dma_prep_interleaved()
1670 hw->hsize = xt->sgl[0].size; in xilinx_vdma_dma_prep_interleaved()
1671 hw->stride = (xt->sgl[0].icg + xt->sgl[0].size) << in xilinx_vdma_dma_prep_interleaved()
1676 if (xt->dir != DMA_MEM_TO_DEV) { in xilinx_vdma_dma_prep_interleaved()
1678 hw->buf_addr = lower_32_bits(xt->dst_start); in xilinx_vdma_dma_prep_interleaved()
1679 hw->buf_addr_msb = upper_32_bits(xt->dst_start); in xilinx_vdma_dma_prep_interleaved()
1681 hw->buf_addr = xt->dst_start; in xilinx_vdma_dma_prep_interleaved()
1685 hw->buf_addr = lower_32_bits(xt->src_start); in xilinx_vdma_dma_prep_interleaved()
1686 hw->buf_addr_msb = upper_32_bits(xt->src_start); in xilinx_vdma_dma_prep_interleaved()
1688 hw->buf_addr = xt->src_start; in xilinx_vdma_dma_prep_interleaved()
1980 struct dma_interleaved_template *xt, in xilinx_dma_prep_interleaved() argument
1988 if (!is_slave_direction(xt->dir)) in xilinx_dma_prep_interleaved()
1991 if (!xt->numf || !xt->sgl[0].size) in xilinx_dma_prep_interleaved()
1994 if (xt->frame_size != 1) in xilinx_dma_prep_interleaved()
2002 chan->direction = xt->dir; in xilinx_dma_prep_interleaved()
2014 if (xt->dir != DMA_MEM_TO_DEV) in xilinx_dma_prep_interleaved()
2015 hw->buf_addr = xt->dst_start; in xilinx_dma_prep_interleaved()
2017 hw->buf_addr = xt->src_start; in xilinx_dma_prep_interleaved()
2020 hw->vsize_stride = (xt->numf << XILINX_DMA_BD_VSIZE_SHIFT) & in xilinx_dma_prep_interleaved()
2022 hw->vsize_stride |= (xt->sgl[0].icg + xt->sgl[0].size) & in xilinx_dma_prep_interleaved()
2024 hw->control = xt->sgl[0].size & XILINX_DMA_BD_HSIZE_MASK; in xilinx_dma_prep_interleaved()
2038 if (xt->dir == DMA_MEM_TO_DEV) { in xilinx_dma_prep_interleaved()