55 #define XILINX_DMA_REG_DMACR			0x0000  macro
953 		dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,  in xilinx_dma_alloc_chan_resources()
958 		dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,  in xilinx_dma_alloc_chan_resources()
1047 	dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RUNSTOP);  in xilinx_dma_stop_transfer()
1079 	dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RUNSTOP);  in xilinx_dma_start()
1128 	reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR);  in xilinx_vdma_start_transfer()
1141 	dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg);  in xilinx_vdma_start_transfer()
1205 	u32 ctrl_reg = dma_read(chan, XILINX_DMA_REG_DMACR);  in xilinx_cdma_start_transfer()
1227 		dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, ctrl_reg);  in xilinx_cdma_start_transfer()
1231 		dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,  in xilinx_cdma_start_transfer()
1234 		dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,  in xilinx_cdma_start_transfer()
1295 	reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR);  in xilinx_dma_start_transfer()
1301 		dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg);  in xilinx_dma_start_transfer()
1420 	dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RESET);  in xilinx_dma_reset()
1423 	err = xilinx_dma_poll_timeout(chan, XILINX_DMA_REG_DMACR, tmp,  in xilinx_dma_reset()
1429 			dma_ctrl_read(chan, XILINX_DMA_REG_DMACR),  in xilinx_dma_reset()
1457 	dma_ctrl_set(chan, XILINX_DMA_REG_DMACR,  in xilinx_dma_chan_reset()
1947 	reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR);  in xilinx_dma_prep_dma_cyclic()
1949 	dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg);  in xilinx_dma_prep_dma_cyclic()
2080 		reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR);  in xilinx_dma_terminate_all()
2082 		dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg);  in xilinx_dma_terminate_all()
2087 		dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,  in xilinx_dma_terminate_all()
2115 	dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR);  in xilinx_vdma_channel_set_config()
2158 	dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, dmacr);  in xilinx_vdma_channel_set_config()
2175 	dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR,  in xilinx_dma_chan_remove()