Lines Matching refs:dmadev
311 static u32 stm32_mdma_read(struct stm32_mdma_device *dmadev, u32 reg) in stm32_mdma_read() argument
313 return readl_relaxed(dmadev->base + reg); in stm32_mdma_read()
316 static void stm32_mdma_write(struct stm32_mdma_device *dmadev, u32 reg, u32 val) in stm32_mdma_write() argument
318 writel_relaxed(val, dmadev->base + reg); in stm32_mdma_write()
321 static void stm32_mdma_set_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_set_bits() argument
324 void __iomem *addr = dmadev->base + reg; in stm32_mdma_set_bits()
329 static void stm32_mdma_clr_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_clr_bits() argument
332 void __iomem *addr = dmadev->base + reg; in stm32_mdma_clr_bits()
429 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_disable_chan() local
437 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_IRQ_MASK); in stm32_mdma_disable_chan()
439 ccr = stm32_mdma_read(dmadev, reg); in stm32_mdma_disable_chan()
441 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_disable_chan()
445 dmadev->base + STM32_MDMA_CISR(id), cisr, in stm32_mdma_disable_chan()
458 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_stop() local
468 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_stop()
472 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_stop()
478 static void stm32_mdma_set_bus(struct stm32_mdma_device *dmadev, u32 *ctbr, in stm32_mdma_set_bus() argument
487 for (i = 0; i < dmadev->nr_ahb_addr_masks; i++) { in stm32_mdma_set_bus()
488 if (mask == dmadev->ahb_addr_masks[i]) { in stm32_mdma_set_bus()
501 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_set_xfer_param() local
514 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_set_xfer_param()
515 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_set_xfer_param()
516 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_set_xfer_param()
605 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_set_xfer_param()
612 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(chan->id), dst_addr); in stm32_mdma_set_xfer_param()
652 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_set_xfer_param()
659 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(chan->id), src_addr); in stm32_mdma_set_xfer_param()
731 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_setup_xfer() local
750 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_setup_xfer()
758 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_setup_xfer()
827 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_cyclic() local
866 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_prep_dma_cyclic()
872 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_prep_dma_cyclic()
916 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_memcpy() local
942 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
943 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
944 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_prep_dma_memcpy()
945 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_prep_dma_memcpy()
968 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, src); in stm32_mdma_prep_dma_memcpy()
969 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, dest); in stm32_mdma_prep_dma_memcpy()
1092 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_dump_reg() local
1095 stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id))); in stm32_mdma_dump_reg()
1097 stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id))); in stm32_mdma_dump_reg()
1099 stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id))); in stm32_mdma_dump_reg()
1101 stm32_mdma_read(dmadev, STM32_MDMA_CSAR(chan->id))); in stm32_mdma_dump_reg()
1103 stm32_mdma_read(dmadev, STM32_MDMA_CDAR(chan->id))); in stm32_mdma_dump_reg()
1105 stm32_mdma_read(dmadev, STM32_MDMA_CBRUR(chan->id))); in stm32_mdma_dump_reg()
1107 stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id))); in stm32_mdma_dump_reg()
1109 stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id))); in stm32_mdma_dump_reg()
1111 stm32_mdma_read(dmadev, STM32_MDMA_CMAR(chan->id))); in stm32_mdma_dump_reg()
1113 stm32_mdma_read(dmadev, STM32_MDMA_CMDR(chan->id))); in stm32_mdma_dump_reg()
1118 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_start_transfer() local
1134 stm32_mdma_write(dmadev, STM32_MDMA_CCR(id), chan->desc->ccr); in stm32_mdma_start_transfer()
1135 stm32_mdma_write(dmadev, STM32_MDMA_CTCR(id), hwdesc->ctcr); in stm32_mdma_start_transfer()
1136 stm32_mdma_write(dmadev, STM32_MDMA_CBNDTR(id), hwdesc->cbndtr); in stm32_mdma_start_transfer()
1137 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(id), hwdesc->csar); in stm32_mdma_start_transfer()
1138 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(id), hwdesc->cdar); in stm32_mdma_start_transfer()
1139 stm32_mdma_write(dmadev, STM32_MDMA_CBRUR(id), hwdesc->cbrur); in stm32_mdma_start_transfer()
1140 stm32_mdma_write(dmadev, STM32_MDMA_CLAR(id), hwdesc->clar); in stm32_mdma_start_transfer()
1141 stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr); in stm32_mdma_start_transfer()
1142 stm32_mdma_write(dmadev, STM32_MDMA_CMAR(id), hwdesc->cmar); in stm32_mdma_start_transfer()
1143 stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr); in stm32_mdma_start_transfer()
1146 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id)); in stm32_mdma_start_transfer()
1148 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(id), status); in stm32_mdma_start_transfer()
1153 stm32_mdma_set_bits(dmadev, STM32_MDMA_CCR(id), STM32_MDMA_CCR_EN); in stm32_mdma_start_transfer()
1158 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_start_transfer()
1204 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_resume() local
1214 stm32_mdma_write(dmadev, STM32_MDMA_CCR(chan->id), chan->desc->ccr); in stm32_mdma_resume()
1217 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_resume()
1219 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_resume()
1225 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_resume()
1229 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_resume()
1278 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_desc_residue() local
1288 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_desc_residue()
1345 struct stm32_mdma_device *dmadev = devid; in stm32_mdma_irq_handler() local
1350 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0); in stm32_mdma_irq_handler()
1354 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR1); in stm32_mdma_irq_handler()
1356 dev_dbg(mdma2dev(dmadev), "spurious it\n"); in stm32_mdma_irq_handler()
1367 chan = &dmadev->chan[id]; in stm32_mdma_irq_handler()
1369 dev_dbg(mdma2dev(dmadev), "MDMA channel not initialized\n"); in stm32_mdma_irq_handler()
1375 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_irq_handler()
1376 ien = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_irq_handler()
1394 status = readl_relaxed(dmadev->base + STM32_MDMA_CESR(id)); in stm32_mdma_irq_handler()
1396 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CTEIF); in stm32_mdma_irq_handler()
1400 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CCTCIF); in stm32_mdma_irq_handler()
1405 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBRTIF); in stm32_mdma_irq_handler()
1409 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBTIF); in stm32_mdma_irq_handler()
1419 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CLTCIF); in stm32_mdma_irq_handler()
1436 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_alloc_chan_resources() local
1449 ret = pm_runtime_get_sync(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1455 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1463 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_free_chan_resources() local
1475 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_free_chan_resources()
1484 struct stm32_mdma_device *dmadev = ofdma->of_dma_data; in stm32_mdma_of_xlate() local
1490 dev_err(mdma2dev(dmadev), "Bad number of args\n"); in stm32_mdma_of_xlate()
1500 if (config.request >= dmadev->nr_requests) { in stm32_mdma_of_xlate()
1501 dev_err(mdma2dev(dmadev), "Bad request line\n"); in stm32_mdma_of_xlate()
1506 dev_err(mdma2dev(dmadev), "Priority level not supported\n"); in stm32_mdma_of_xlate()
1510 c = dma_get_any_slave_channel(&dmadev->ddev); in stm32_mdma_of_xlate()
1512 dev_err(mdma2dev(dmadev), "No more channels available\n"); in stm32_mdma_of_xlate()
1531 struct stm32_mdma_device *dmadev; in stm32_mdma_probe() local
1562 dmadev = devm_kzalloc(&pdev->dev, sizeof(*dmadev) + sizeof(u32) * count, in stm32_mdma_probe()
1564 if (!dmadev) in stm32_mdma_probe()
1567 dmadev->nr_channels = nr_channels; in stm32_mdma_probe()
1568 dmadev->nr_requests = nr_requests; in stm32_mdma_probe()
1570 dmadev->ahb_addr_masks, in stm32_mdma_probe()
1572 dmadev->nr_ahb_addr_masks = count; in stm32_mdma_probe()
1575 dmadev->base = devm_ioremap_resource(&pdev->dev, res); in stm32_mdma_probe()
1576 if (IS_ERR(dmadev->base)) in stm32_mdma_probe()
1577 return PTR_ERR(dmadev->base); in stm32_mdma_probe()
1579 dmadev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_mdma_probe()
1580 if (IS_ERR(dmadev->clk)) { in stm32_mdma_probe()
1581 ret = PTR_ERR(dmadev->clk); in stm32_mdma_probe()
1587 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_probe()
1593 dmadev->rst = devm_reset_control_get(&pdev->dev, NULL); in stm32_mdma_probe()
1594 if (!IS_ERR(dmadev->rst)) { in stm32_mdma_probe()
1595 reset_control_assert(dmadev->rst); in stm32_mdma_probe()
1597 reset_control_deassert(dmadev->rst); in stm32_mdma_probe()
1600 dd = &dmadev->ddev; in stm32_mdma_probe()
1632 for (i = 0; i < dmadev->nr_channels; i++) { in stm32_mdma_probe()
1633 chan = &dmadev->chan[i]; in stm32_mdma_probe()
1639 dmadev->irq = platform_get_irq(pdev, 0); in stm32_mdma_probe()
1640 if (dmadev->irq < 0) in stm32_mdma_probe()
1641 return dmadev->irq; in stm32_mdma_probe()
1643 ret = devm_request_irq(&pdev->dev, dmadev->irq, stm32_mdma_irq_handler, in stm32_mdma_probe()
1644 0, dev_name(&pdev->dev), dmadev); in stm32_mdma_probe()
1654 ret = of_dma_controller_register(of_node, stm32_mdma_of_xlate, dmadev); in stm32_mdma_probe()
1661 platform_set_drvdata(pdev, dmadev); in stm32_mdma_probe()
1678 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_suspend() local
1680 clk_disable_unprepare(dmadev->clk); in stm32_mdma_runtime_suspend()
1687 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_resume() local
1690 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_runtime_resume()