Lines Matching refs:stm32_dma_write
241 static void stm32_dma_write(struct stm32_dma_device *dmadev, u32 reg, u32 val) in stm32_dma_write() function
417 stm32_dma_write(dmadev, STM32_DMA_HIFCR, dma_ifcr); in stm32_dma_irq_clear()
419 stm32_dma_write(dmadev, STM32_DMA_LIFCR, dma_ifcr); in stm32_dma_irq_clear()
433 stm32_dma_write(dmadev, STM32_DMA_SCR(id), dma_scr); in stm32_dma_disable_chan()
462 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), dma_scr); in stm32_dma_stop()
465 stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), dma_sfcr); in stm32_dma_stop()
558 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
559 stm32_dma_write(dmadev, STM32_DMA_SPAR(chan->id), reg->dma_spar); in stm32_dma_start_transfer()
560 stm32_dma_write(dmadev, STM32_DMA_SM0AR(chan->id), reg->dma_sm0ar); in stm32_dma_start_transfer()
561 stm32_dma_write(dmadev, STM32_DMA_SFCR(chan->id), reg->dma_sfcr); in stm32_dma_start_transfer()
562 stm32_dma_write(dmadev, STM32_DMA_SM1AR(chan->id), reg->dma_sm1ar); in stm32_dma_start_transfer()
563 stm32_dma_write(dmadev, STM32_DMA_SNDTR(chan->id), reg->dma_sndtr); in stm32_dma_start_transfer()
579 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
603 stm32_dma_write(dmadev, STM32_DMA_SM0AR(id), dma_sm0ar); in stm32_dma_configure_next_sg()
608 stm32_dma_write(dmadev, STM32_DMA_SM1AR(id), dma_sm1ar); in stm32_dma_configure_next_sg()