Lines Matching refs:dma_scr

171 	u32 dma_scr;  member
355 chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_DMEIE; in stm32_dma_set_fifo_config()
359 chan->chan_reg.dma_scr |= STM32_DMA_SCR_DMEIE; in stm32_dma_set_fifo_config()
426 u32 dma_scr, id; in stm32_dma_disable_chan() local
429 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_disable_chan()
431 if (dma_scr & STM32_DMA_SCR_EN) { in stm32_dma_disable_chan()
432 dma_scr &= ~STM32_DMA_SCR_EN; in stm32_dma_disable_chan()
433 stm32_dma_write(dmadev, STM32_DMA_SCR(id), dma_scr); in stm32_dma_disable_chan()
436 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_disable_chan()
437 dma_scr &= STM32_DMA_SCR_EN; in stm32_dma_disable_chan()
438 if (!dma_scr) in stm32_dma_disable_chan()
456 u32 dma_scr, dma_sfcr, status; in stm32_dma_stop() local
460 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id)); in stm32_dma_stop()
461 dma_scr &= ~STM32_DMA_SCR_IRQ_MASK; in stm32_dma_stop()
462 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), dma_scr); in stm32_dma_stop()
558 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
578 reg->dma_scr |= STM32_DMA_SCR_EN; in stm32_dma_start_transfer()
579 stm32_dma_write(dmadev, STM32_DMA_SCR(chan->id), reg->dma_scr); in stm32_dma_start_transfer()
590 u32 dma_scr, dma_sm0ar, dma_sm1ar, id; in stm32_dma_configure_next_sg() local
593 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_configure_next_sg()
595 if (dma_scr & STM32_DMA_SCR_DBM) { in stm32_dma_configure_next_sg()
601 if (dma_scr & STM32_DMA_SCR_CT) { in stm32_dma_configure_next_sg()
701 u32 dma_scr, threshold; in stm32_dma_set_xfer_param() local
743 dma_scr = STM32_DMA_SCR_DIR(STM32_DMA_MEM_TO_DEV) | in stm32_dma_set_xfer_param()
792 dma_scr = STM32_DMA_SCR_DIR(STM32_DMA_DEV_TO_MEM) | in stm32_dma_set_xfer_param()
815 chan->chan_reg.dma_scr &= ~(STM32_DMA_SCR_DIR_MASK | in stm32_dma_set_xfer_param()
818 chan->chan_reg.dma_scr |= dma_scr; in stm32_dma_set_xfer_param()
856 chan->chan_reg.dma_scr |= STM32_DMA_SCR_PFCTRL; in stm32_dma_prep_slave_sg()
858 chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL; in stm32_dma_prep_slave_sg()
875 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr; in stm32_dma_prep_slave_sg()
942 chan->chan_reg.dma_scr |= STM32_DMA_SCR_CIRC; in stm32_dma_prep_dma_cyclic()
944 chan->chan_reg.dma_scr |= STM32_DMA_SCR_DBM; in stm32_dma_prep_dma_cyclic()
947 chan->chan_reg.dma_scr &= ~STM32_DMA_SCR_PFCTRL; in stm32_dma_prep_dma_cyclic()
959 desc->sg_req[i].chan_reg.dma_scr = chan->chan_reg.dma_scr; in stm32_dma_prep_dma_cyclic()
1003 desc->sg_req[i].chan_reg.dma_scr = in stm32_dma_prep_dma_memcpy()
1028 u32 dma_scr, width, ndtr; in stm32_dma_get_remaining_bytes() local
1031 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(chan->id)); in stm32_dma_get_remaining_bytes()
1032 width = STM32_DMA_SCR_PSIZE_GET(dma_scr); in stm32_dma_get_remaining_bytes()
1054 u32 dma_scr, dma_smar, id; in stm32_dma_is_current_sg() local
1057 dma_scr = stm32_dma_read(dmadev, STM32_DMA_SCR(id)); in stm32_dma_is_current_sg()
1059 if (!(dma_scr & STM32_DMA_SCR_DBM)) in stm32_dma_is_current_sg()
1064 if (dma_scr & STM32_DMA_SCR_CT) { in stm32_dma_is_current_sg()
1218 chan->chan_reg.dma_scr = cfg->stream_config & STM32_DMA_SCR_CFG_MASK; in stm32_dma_set_config()
1219 chan->chan_reg.dma_scr |= STM32_DMA_SCR_REQ(cfg->request_line); in stm32_dma_set_config()
1222 chan->chan_reg.dma_scr |= STM32_DMA_SCR_TEIE | STM32_DMA_SCR_TCIE; in stm32_dma_set_config()