904 #define IOP_ADMA_NUM_SRC_TEST 4 /* must be <= 15 */  macro
910 	struct page *xor_srcs[IOP_ADMA_NUM_SRC_TEST];  in iop_adma_xor_val_self_test()
911 	struct page *zero_sum_srcs[IOP_ADMA_NUM_SRC_TEST + 1];  in iop_adma_xor_val_self_test()
912 	dma_addr_t dma_srcs[IOP_ADMA_NUM_SRC_TEST + 1];  in iop_adma_xor_val_self_test()
925 	for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {  in iop_adma_xor_val_self_test()
942 	for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++) {  in iop_adma_xor_val_self_test()
948 	for (src_idx = 0; src_idx < IOP_ADMA_NUM_SRC_TEST; src_idx++)  in iop_adma_xor_val_self_test()
967 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++)  in iop_adma_xor_val_self_test()
971 				   IOP_ADMA_NUM_SRC_TEST, PAGE_SIZE,  in iop_adma_xor_val_self_test()
1006 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++)  in iop_adma_xor_val_self_test()
1012 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 1; i++)  in iop_adma_xor_val_self_test()
1017 				       IOP_ADMA_NUM_SRC_TEST + 1, PAGE_SIZE,  in iop_adma_xor_val_self_test()
1041 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 1; i++)  in iop_adma_xor_val_self_test()
1046 				       IOP_ADMA_NUM_SRC_TEST + 1, PAGE_SIZE,  in iop_adma_xor_val_self_test()
1071 	src_idx = IOP_ADMA_NUM_SRC_TEST;  in iop_adma_xor_val_self_test()
1083 	struct page *pq[IOP_ADMA_NUM_SRC_TEST+2+2];  in iop_adma_pq_zero_sum_self_test()
1085 	struct page **pq_hw = &pq[IOP_ADMA_NUM_SRC_TEST+2];  in iop_adma_pq_zero_sum_self_test()
1087 	void *pq_sw[IOP_ADMA_NUM_SRC_TEST+2];  in iop_adma_pq_zero_sum_self_test()
1088 	dma_addr_t pq_src[IOP_ADMA_NUM_SRC_TEST+2];  in iop_adma_pq_zero_sum_self_test()
1089 	dma_addr_t *pq_dest = &pq_src[IOP_ADMA_NUM_SRC_TEST];  in iop_adma_pq_zero_sum_self_test()
1111 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++) {  in iop_adma_pq_zero_sum_self_test()
1135 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST; i++)  in iop_adma_pq_zero_sum_self_test()
1140 				  IOP_ADMA_NUM_SRC_TEST, (u8 *)raid6_gfexp,  in iop_adma_pq_zero_sum_self_test()
1156 	raid6_call.gen_syndrome(IOP_ADMA_NUM_SRC_TEST+2, PAGE_SIZE, pq_sw);  in iop_adma_pq_zero_sum_self_test()
1158 	if (memcmp(pq_sw[IOP_ADMA_NUM_SRC_TEST],  in iop_adma_pq_zero_sum_self_test()
1164 	if (memcmp(pq_sw[IOP_ADMA_NUM_SRC_TEST+1],  in iop_adma_pq_zero_sum_self_test()
1172 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 2; i++)  in iop_adma_pq_zero_sum_self_test()
1177 	tx = iop_adma_prep_dma_pq_val(dma_chan, &pq_src[IOP_ADMA_NUM_SRC_TEST],  in iop_adma_pq_zero_sum_self_test()
1178 				      pq_src, IOP_ADMA_NUM_SRC_TEST,  in iop_adma_pq_zero_sum_self_test()
1201 	i = IOP_ADMA_NUM_SRC_TEST;  in iop_adma_pq_zero_sum_self_test()
1204 	for (i = 0; i < IOP_ADMA_NUM_SRC_TEST + 2; i++)  in iop_adma_pq_zero_sum_self_test()
1209 	tx = iop_adma_prep_dma_pq_val(dma_chan, &pq_src[IOP_ADMA_NUM_SRC_TEST],  in iop_adma_pq_zero_sum_self_test()
1210 				      pq_src, IOP_ADMA_NUM_SRC_TEST,  in iop_adma_pq_zero_sum_self_test()