886 	unsigned int ctxarb_ctl, ctx_enables;  in qat_hal_exec_micro_inst()  local
904 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_exec_micro_inst()
905 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_exec_micro_inst()
915 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_exec_micro_inst()
961 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_exec_micro_inst()
972 	unsigned int ctxarb_cntl, ustore_addr, ctx_enables;  in qat_hal_rd_rel_reg()  local
992 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_rd_rel_reg()
993 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_rd_rel_reg()
998 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_rd_rel_reg()
1022 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_rd_rel_reg()
1188 	unsigned int ctx_enables;  in qat_hal_put_rel_rd_xfer()  local
1192 	status = ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_rd_xfer()
1193 	if (CE_INUSE_CONTEXTS & ctx_enables) {  in qat_hal_put_rel_rd_xfer()
1227 	unsigned int gprval, ctx_enables;  in qat_hal_put_rel_wr_xfer()  local
1242 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_wr_xfer()
1243 	if (CE_INUSE_CONTEXTS & ctx_enables) {  in qat_hal_put_rel_wr_xfer()
1283 	unsigned int ctx_enables;  in qat_hal_put_rel_nn()  local
1286 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_nn()
1287 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_put_rel_nn()
1288 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables | CE_NN_MODE);  in qat_hal_put_rel_nn()
1291 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_put_rel_nn()
1301 	unsigned int ctx_enables;  in qat_hal_convert_abs_to_rel()  local
1303 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_convert_abs_to_rel()
1304 	if (ctx_enables & CE_INUSE_CONTEXTS) {  in qat_hal_convert_abs_to_rel()