473 				 unsigned int *seq_size)  in cc_setup_readiv_desc()  argument
493 		hw_desc_init(&desc[*seq_size]);  in cc_setup_readiv_desc()
494 		set_dout_dlli(&desc[*seq_size], iv_dma_addr, ivsize, NS_BIT, 1);  in cc_setup_readiv_desc()
495 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_readiv_desc()
496 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_readiv_desc()
497 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_readiv_desc()
500 			set_setup_mode(&desc[*seq_size], SETUP_WRITE_STATE1);  in cc_setup_readiv_desc()
502 			set_setup_mode(&desc[*seq_size], SETUP_WRITE_STATE0);  in cc_setup_readiv_desc()
504 		set_queue_last_ind(ctx_p->drvdata, &desc[*seq_size]);  in cc_setup_readiv_desc()
505 		(*seq_size)++;  in cc_setup_readiv_desc()
511 		hw_desc_init(&desc[*seq_size]);  in cc_setup_readiv_desc()
512 		set_setup_mode(&desc[*seq_size], SETUP_WRITE_STATE1);  in cc_setup_readiv_desc()
513 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_readiv_desc()
514 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_readiv_desc()
515 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_readiv_desc()
516 		set_dout_dlli(&desc[*seq_size], iv_dma_addr, CC_AES_BLOCK_SIZE,  in cc_setup_readiv_desc()
518 		set_queue_last_ind(ctx_p->drvdata, &desc[*seq_size]);  in cc_setup_readiv_desc()
519 		(*seq_size)++;  in cc_setup_readiv_desc()
530 				 unsigned int *seq_size)  in cc_setup_state_desc()  argument
557 		hw_desc_init(&desc[*seq_size]);  in cc_setup_state_desc()
558 		set_din_type(&desc[*seq_size], DMA_DLLI, iv_dma_addr, ivsize,  in cc_setup_state_desc()
560 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_state_desc()
561 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_state_desc()
562 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_state_desc()
565 			set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE1);  in cc_setup_state_desc()
567 			set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE0);  in cc_setup_state_desc()
569 		(*seq_size)++;  in cc_setup_state_desc()
575 		hw_desc_init(&desc[*seq_size]);  in cc_setup_state_desc()
576 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_state_desc()
577 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_state_desc()
579 			set_hw_crypto_key(&desc[*seq_size],  in cc_setup_state_desc()
582 			set_din_type(&desc[*seq_size], DMA_DLLI,  in cc_setup_state_desc()
586 		set_xex_data_unit_size(&desc[*seq_size], du_size);  in cc_setup_state_desc()
587 		set_flow_mode(&desc[*seq_size], S_DIN_to_AES2);  in cc_setup_state_desc()
588 		set_key_size_aes(&desc[*seq_size], (key_len / 2));  in cc_setup_state_desc()
589 		set_setup_mode(&desc[*seq_size], SETUP_LOAD_XEX_KEY);  in cc_setup_state_desc()
590 		(*seq_size)++;  in cc_setup_state_desc()
593 		hw_desc_init(&desc[*seq_size]);  in cc_setup_state_desc()
594 		set_setup_mode(&desc[*seq_size], SETUP_LOAD_STATE1);  in cc_setup_state_desc()
595 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_state_desc()
596 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_state_desc()
597 		set_key_size_aes(&desc[*seq_size], (key_len / 2));  in cc_setup_state_desc()
598 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_state_desc()
599 		set_din_type(&desc[*seq_size], DMA_DLLI, iv_dma_addr,  in cc_setup_state_desc()
601 		(*seq_size)++;  in cc_setup_state_desc()
625 			      unsigned int *seq_size)  in cc_setup_key_desc()  argument
643 		hw_desc_init(&desc[*seq_size]);  in cc_setup_key_desc()
644 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_key_desc()
645 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_key_desc()
649 			set_key_size_aes(&desc[*seq_size], key_len);  in cc_setup_key_desc()
650 			set_cpp_crypto_key(&desc[*seq_size], ctx_p->cpp.slot);  in cc_setup_key_desc()
655 					set_hw_crypto_key(&desc[*seq_size],  in cc_setup_key_desc()
665 					set_din_type(&desc[*seq_size], DMA_DLLI,  in cc_setup_key_desc()
669 				set_key_size_aes(&desc[*seq_size], key_len);  in cc_setup_key_desc()
672 				set_din_type(&desc[*seq_size], DMA_DLLI,  in cc_setup_key_desc()
674 				set_key_size_des(&desc[*seq_size], key_len);  in cc_setup_key_desc()
676 			set_setup_mode(&desc[*seq_size], SETUP_LOAD_KEY0);  in cc_setup_key_desc()
678 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_key_desc()
679 		(*seq_size)++;  in cc_setup_key_desc()
685 		hw_desc_init(&desc[*seq_size]);  in cc_setup_key_desc()
686 		set_cipher_mode(&desc[*seq_size], cipher_mode);  in cc_setup_key_desc()
687 		set_cipher_config0(&desc[*seq_size], direction);  in cc_setup_key_desc()
689 			set_hw_crypto_key(&desc[*seq_size],  in cc_setup_key_desc()
692 			set_din_type(&desc[*seq_size], DMA_DLLI, key_dma_addr,  in cc_setup_key_desc()
695 		set_key_size_aes(&desc[*seq_size], (key_len / 2));  in cc_setup_key_desc()
696 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_key_desc()
697 		set_setup_mode(&desc[*seq_size], SETUP_LOAD_KEY0);  in cc_setup_key_desc()
698 		(*seq_size)++;  in cc_setup_key_desc()
709 			       struct cc_hw_desc desc[], unsigned int *seq_size)  in cc_setup_mlli_desc()  argument
720 		hw_desc_init(&desc[*seq_size]);  in cc_setup_mlli_desc()
721 		set_din_type(&desc[*seq_size], DMA_DLLI,  in cc_setup_mlli_desc()
724 		set_dout_sram(&desc[*seq_size],  in cc_setup_mlli_desc()
727 		set_flow_mode(&desc[*seq_size], BYPASS);  in cc_setup_mlli_desc()
728 		(*seq_size)++;  in cc_setup_mlli_desc()
736 			       unsigned int *seq_size)  in cc_setup_flow_desc()  argument
750 		hw_desc_init(&desc[*seq_size]);  in cc_setup_flow_desc()
751 		set_din_type(&desc[*seq_size], DMA_DLLI, sg_dma_address(src),  in cc_setup_flow_desc()
753 		set_dout_dlli(&desc[*seq_size], sg_dma_address(dst),  in cc_setup_flow_desc()
756 			set_queue_last_ind(ctx_p->drvdata, &desc[*seq_size]);  in cc_setup_flow_desc()
758 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_flow_desc()
759 		(*seq_size)++;  in cc_setup_flow_desc()
761 		hw_desc_init(&desc[*seq_size]);  in cc_setup_flow_desc()
762 		set_din_type(&desc[*seq_size], DMA_MLLI,  in cc_setup_flow_desc()
769 			set_dout_mlli(&desc[*seq_size],  in cc_setup_flow_desc()
778 			set_dout_mlli(&desc[*seq_size],  in cc_setup_flow_desc()
786 			set_queue_last_ind(ctx_p->drvdata, &desc[*seq_size]);  in cc_setup_flow_desc()
788 		set_flow_mode(&desc[*seq_size], flow_mode);  in cc_setup_flow_desc()
789 		(*seq_size)++;  in cc_setup_flow_desc()